Plug Spacer Layout for Precise Silicide Contact in MOS Transistors
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Solution Overview
Problem
The existing process for fabricating metal-oxide-semiconductor transistors lacks an effective method to enhance the structural reliability and operational performance of the metal silicide layer between the contact plug and the gate/source/drain, leading to suboptimal electrical connections.
Innovation Solution
A plug spacer is disposed on the sidewalls of the plug hole to precisely define the forming location and depth of the metal silicide layer, ensuring optimal contact between the plug and the substrate, thereby improving the semiconductor device's performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal silicide layer is formed between the contact plug and gate/source/drain to improve ohmic contact, then the electrical connection is improved, but the manufacturing process complexity increases and the structural reliability is not sufficiently enhanced
Solution Approach 1:
The plug spacer is formed in advance before the metal silicide layer deposition. This preliminary structure defines the exact location where the metal silicide layer will be formed, ensuring precise control over the contact interface between the plug and gate/source/drain, thereby enhancing structural reliability without adding excessive process complexity
Solution Approach 2:
The plug spacer acts as an intermediary structure that mediates between the plug hole and the metal silicide layer. It provides a defined interface that controls the formation location and depth of the metal silicide layer, ensuring optimal ohmic contact while maintaining process simplicity
2Manufacturing precision
If the metal silicide layer is formed without precise location control, then the manufacturing process is simpler, but the lateral contact resistance is high and electrical performance is poor
Solution Approach 1:
The plug spacer serves as a mediator that defines the precise location and depth for metal silicide layer formation. By controlling where the metal silicide layer is deposited, it ensures low lateral contact resistance and high electrical performance without significantly complicating the manufacturing process
Solution Approach 2:
The plug spacer creates a localized region with specific properties (defined geometry and position) where the metal silicide layer will form. This local quality control ensures that the metal silicide layer is formed precisely where needed, achieving low contact resistance while maintaining overall process simplicity
Data Source
AI summary
The present disclosure relates to a semiconductor device and a fabricating method thereof, includes a substrate, a gate structure, a plug hole, a plug spacer, a metal silicide layer, and a plug. The gate structure is disposed on the substrate. The plug hole is disposed within a dielectric layer to partially extended into the substrate. The plug spacer is disposed on a sidewall of the plug hole to partially expose the substrate. The metal silicide layer is disposed at a bottom of the plug hole, wherein a portion of the substrate is sandwiched between the metal silicide layer and the plug spacer. The plug is disposed in the plug hole to physically contact the portion of the substrate. Accordingly, through forming the plug spacer to precisely define the forming location and the depth of the metal silicide layer, thereby achieving the function on improving the performance of the semiconductor device.