Plug Structure With Insulating Covering for Metal Diffusion Isolation
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Solution Overview
Problem
Semiconductor devices face challenges in scaling down while maintaining quality, yield, performance, and reliability due to issues such as metal ion diffusion causing shorts between conductive features.
Innovation Solution
A semiconductor device design featuring a plug structure with a bottom conductive layer, a middle conductive layer, a top conductive layer, and an insulating covering layer, where the insulating covering layer prevents metal ions from diffusing and contaminating adjacent elements, thereby reducing shorts and improving reliability and electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conductive layers are scaled down to improve computing ability, then device dimensions are reduced, but metal ion diffusion causes shorts between conductive features
Solution Approach 1:
An insulating covering layer is introduced as an intermediary barrier between adjacent conductive layers. This intermediate insulating layer prevents direct contact and metal ion diffusion between conductive features, thereby resolving the short circuit problem that arises when device dimensions are scaled down.
Solution Approach 2:
The plug structure employs a composite material architecture combining conductive layers (for electrical connectivity) with insulating covering layers (for isolation). This composite structure maintains electrical performance while preventing harmful metal ion diffusion, enabling reliable scaling to smaller dimensions.
2Reliability
If insulating covering layer is added to prevent metal ion diffusion, then reliability is improved, but device complexity increases
Solution Approach 1:
The plug structure is segmented into distinct functional layers: bottom conductive layer, middle conductive layer, top conductive layer, and insulating covering layers. This segmentation allows each layer to perform its specific function (conduction or isolation) efficiently, improving reliability while maintaining manufacturability through standardized layer-by-layer fabrication processes.
Data Source
AI summary
The present application discloses a semiconductor device. The semiconductor device includes a substrate; a plug structure including a bottom conductive layer positioned on the substrate, a middle conductive layer positioned on the bottom conductive layer, a top conductive layer positioned on the middle conductive layer, and an insulating covering layer covering a sidewall of the middle conductive layer and positioned between the bottom conductive layer and the top conductive layer; and a first dielectric layer positioned on the substrate and surrounding the plug structure. A width of the bottom conductive layer is greater than a width of the middle conductive layer. A width of the top conductive layer is greater than the width of the middle conductive layer.