Power Management Circuit Standby Shutdown Sequence

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Solution Overview

Problem

Electronic devices with multiple power circuits face high power consumption due to inefficient power management, particularly when monitoring the power-on key and generating supply voltages, leading to unnecessary energy usage and potential battery discharge.

Innovation Solution

A power management circuit with a real-time clock and power-on detecting unit that independently monitors the power-on key and controls the startup sequence of power circuits, eliminating the need for an additional oscillator and allowing for scheduled shutdown and startup, thereby reducing overall power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the CPU monitors the power-on key using system voltage, then the power-on key can be detected, but the CPU cannot be completely shut down and continues to consume power

Engineering Contradiction:
Improvepower-on key detectionVSAvoidCPU power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The power management function is segmented from the CPU and placed in a dedicated PMIC. The PMIC includes a separate power-on detecting unit that monitors the power-on key independently, allowing the CPU to be completely shut down while maintaining reliable power-on detection capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A PMIC (power management integrated circuit) is introduced as an intermediary between the power-on key and the CPU. The PMIC performs power-on detection and power management functions, enabling the CPU to remain completely off while still detecting power-on key status through the PMIC's monitoring unit.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Extent of automation

If the PMIC uses an additional oscillator for sequence control, then the power circuits can be controlled precisely, but the device complexity and power consumption increase

Engineering Contradiction:
Improvepower circuit sequence controlVSAvoidoscillator quantity
Core Design Contradiction:
Extent of automationVSDevice complexity

Solution Approach 1:

The real-time clock (RTC) unit in the PMIC is made multi-functional by using it for both timekeeping and power circuit sequence control. This eliminates the need for a separate oscillator dedicated to sequence control, reducing device complexity while maintaining precise automated control capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The functions of timekeeping and sequence control are merged into a single RTC unit within the PMIC. By combining these functions, the patent eliminates the need for additional oscillators and reduces overall device complexity while maintaining precise control over power circuit startup sequences.

Inventive Principle:
Principle #5Merging (Combining)

3Speed

If the PMIC starts up power circuits immediately upon key press, then the response time is fast, but unnecessary power consumption occurs when battery voltage is low

Engineering Contradiction:
Improvepower-on response timeVSAvoidbattery discharge
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The PMIC performs preliminary checks of battery voltage and power source status before initiating the power circuit startup sequence. This preliminary action prevents unnecessary power consumption and battery discharge while maintaining fast response time by still enabling immediate startup when battery voltage is sufficient.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9841805B2Power management circuit and electronic device employing the same
Publication Date: 2017.12.12 ROHM CO LTD
  • US9841805B2 patent drawing
  • US9841805B2 patent drawing
  • US9841805B2 patent drawing

AI summary

A power management circuit that controls a plurality of power circuits for generating supply voltages at least for a processor is disclosed. The circuit includes: a real time clock that generates clock signals with a predetermined frequency; a power-on terminal to which a power-on key is connected, wherein the power-on terminal receives a voltage whose level depends on whether the power-on key is pressed or not; a power-on detecting unit that monitors a voltage at the power-on terminal and asserts a start signal if it is determined using the clock signals that the power-on key is pressed and held for a predetermined time period; and a power management controller that receives a system voltage based on a battery voltage or a DC voltage from a DC power source and, upon the start signal is asserted, starts up the plurality of power circuits in a predetermined sequence using the clock signals.