Cache-Coherent Persistent Memory Error Correction Module
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Solution Overview
Problem
There is a mismatch in error rates between device memory and persistent backend storage in PMEM devices, and lack of error protection mechanisms between them, resulting in an overall error rate that does not meet system requirements.
Innovation Solution
Implementing an error correction capability between the device memory and the persistent backend storage in PMEM devices, using configurable error correction modules that encode and decode data according to an I/O protocol, thereby closing the error rate gap and improving the overall error rate of the PMEM device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If no error protection mechanism is implemented between device memory and persistent backend storage, then device complexity is reduced, but the overall error rate does not meet system requirements
Solution Approach 1:
An error correction module is introduced as an intermediary component between the volatile memory module and non-volatile storage module. This module receives data from the volatile memory, encodes it with error correction codes, and stores the encoded data in non-volatile storage. The module also includes a decoder that reads encoded data from non-volatile storage and reconstructs the original data, thereby mediating the data transfer and providing error protection without requiring the memory components themselves to be more complex
Solution Approach 2:
The error correction module performs encoding of data before it is stored in the non-volatile storage module. This preliminary action ensures that error correction information is prepared and attached to the data in advance, so that when data is later retrieved from non-volatile storage, the correction information is already available for immediate use, improving reliability without adding complexity to the retrieval operation
2Reliability
If error correction capability is added between device memory and persistent backend storage, then the error rate gap is closed, but device complexity increases
Solution Approach 1:
The error correction functionality is segmented into a separate, dedicated module that operates independently from the volatile memory and non-volatile storage components. This segmentation allows the error correction logic to be isolated, configured, and optimized without affecting the core memory operations, thereby closing the error rate gap while managing device complexity through modular architecture
Solution Approach 2:
The error correction module is designed with configurable parameters that can be adjusted according to the specific error characteristics of the storage system. By changing parameters such as the type of error correction code, the level of protection, and the encoding/decoding algorithms, the system can adapt to different reliability requirements without fundamentally changing the overall device architecture, thus managing complexity while improving reliability
Data Source
AI summary
A cache-coherent persistent memory (PMEM) device includes an input/output (I/O) interface; a volatile memory module; an error correction module which is configurable according to an I/O protocol; a non-volatile storage module; and at least one processor configured to: receive a store command and data corresponding to the store command from a host device through the I/O interface, based on the store command, control the volatile memory module to store the data, control the error correction module to encode the data to generate encoded data, and control the non-volatile storage module to store the encoded data.