Adaptive PMIC Channel Sequencing for Low-Latency Power-Up

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Solution Overview

Problem

Existing power management integrated circuits (PMICs) face inefficiencies in channel enabling and disabling sequences due to fixed timing schedules, leading to unnecessary delays and inefficiencies in power up and down operations, especially when channels reach their regulated states at varying times.

Innovation Solution

A PMIC with a dynamic sequencing strategy that enables channels based on their actual regulation status, using a binary search algorithm to identify the next channel for enablement after the previous one is fully powered, combined with a time-based approach for power down to ensure proper discharge.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If fixed timing schedules are used for channel enabling, then channel power-up sequence is simplified, but latency increases and power-up predictability deteriorates

Engineering Contradiction:
Improvechannel enabling sequence complexityVSAvoidpower-up latency
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent implements a dynamic sequencing strategy where the PMIC adapts the channel enabling sequence based on real-time regulation status detection. Instead of following a fixed predetermined schedule, the system dynamically determines which channel to enable next by monitoring whether previously enabled channels have reached their regulated states, thereby reducing latency while maintaining manageable complexity through structured monitoring protocols

Inventive Principle:
Principle #15Dynamics

2Device complexity

If fixed timing schedules are used for channel enabling, then control logic is simplified, but power-up predictability and synchronization deteriorate

Engineering Contradiction:
Improvecontrol logic complexityVSAvoidpower-up predictability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent employs feedback mechanisms where the PMIC continuously monitors the regulation status of enabled channels and uses this information to determine the next channel to enable. This feedback-driven approach ensures predictable and reliable power-up sequences by adapting to actual channel readiness states, while control logic complexity is managed through systematic monitoring and decision protocols

Inventive Principle:
Principle #23Feedback

3Productivity

If channels are enabled based on regulation status monitoring, then power-up efficiency improves, but control complexity increases

Engineering Contradiction:
Improvepower-up efficiencyVSAvoidsequencing control complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by having the PMIC monitor and detect the regulation status of channels in advance before enabling the next channel. This proactive monitoring approach allows the system to be ready to enable the next channel immediately when conditions are met, improving power-up efficiency while controlling complexity through pre-established monitoring frameworks and clear enabling criteria

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP4697139A1Adaptive multi-channel sequencer for power management integrated circuit
Publication Date: 2026.02.18 NXP USA INC
  • EP4697139A1 patent drawingFigure 1
  • EP4697139A1 patent drawingFigure 2
  • EP4697139A1 patent drawingFigure 3

AI summary

A PMIC includes a controller configured to determine, based on a configuration stored in the memory, a power on mode, when the power on mode indicates a dynamic power on operation, execute the dynamic power on operation by: determining, of the plurality of channels, a first channel associated with a first dynamic sequence number that is a lowest dynamic sequence number of the plurality of dynamic sequence numbers, enabling the first channel, monitoring the first channel to determine whether the first channel is in a first regulated state, and while monitoring the first channel, determining, of the plurality of channels, a second channel associated with a second dynamic sequence number of the plurality of dynamic sequence numbers, when the power on mode indicates a time based power on operation: iterating a slot counter through the plurality of slot numbers.