Power Supply Management Circuit Cyclic Page Erasure
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Solution Overview
Problem
Conventional power supply management circuits face challenges in quickly writing data to nonvolatile memory during power loss, as existing techniques require erasing a write target page, which prolongs the data writing process and may not complete before the device becomes inoperative.
Innovation Solution
A power supply management circuit that selects an already-erased page as the write target and immediately erases all other pages, allowing for rapid data storage by using a memory control circuit that writes data in a cyclic manner and employs cyclic redundancy checks to determine erased pages, ensuring data is written before power loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the write target page is erased before writing data, then data can be written to the nonvolatile memory, but the data writing time is prolonged
Solution Approach 1:
The system pre-erases pages in advance during normal operation when power is available, so that when power loss occurs, already-erased pages are immediately available for writing without requiring erasure during the critical power loss window. This preliminary preparation eliminates the erasure step from the urgent data writing path.
Solution Approach 2:
The nonvolatile memory is divided into multiple pages, allowing the system to maintain a pool of pre-erased pages separate from pages containing valid data. This segmentation enables independent management of erasure and write operations, so that data writing can proceed immediately to pre-prepared pages without waiting for erasure completion.
2Loss of time
If multiple pages are maintained in the nonvolatile memory, then data writing can be performed quickly using pre-erased pages, but the device complexity increases
Solution Approach 1:
The memory control circuit automatically manages the pool of pre-erased pages through self-service mechanisms: it monitors page erasure status, selects appropriate pre-erased pages for writing, and triggers erasure of used pages after successful data writing. This automation eliminates the need for complex external management while maintaining the benefits of multiple page management.
Solution Approach 2:
The system employs feedback mechanisms where the memory control circuit continuously monitors the erasure status of memory pages and adjusts its page selection and erasure triggering accordingly. This feedback loop simplifies management by making the system self-regulating rather than requiring complex external control logic.
Data Source
AI summary
A PMIC controls multiple power supply circuits. Nonvolatile memory supports repeated writing and has multiple pages. A memory control circuit selects one from among the multiple pages of the nonvolatile memory and writes internal data that indicates an internal state of the power supply management circuit to the write target page. The memory control circuit selects an already-erased page as the write target page and writes the internal data to it, and erases pages other than the write target page.


