PMIC Clocked Data Arbitration for Shared-Line Conflict Avoidance
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Solution Overview
Problem
The development of single power management integrated circuits (PMICs) to handle diverse customer requirements incurs high costs due to the need for a large variety of PMICs.
Innovation Solution
A power supply system configured with a single first semiconductor IC and multiple second semiconductor ICs, utilizing transmission lines for clock and data signal transmission, along with confirmation, mediation, and synchronizing circuits to manage data transmission and prevent conflicts, allowing for efficient handling of diversified customer requirements at lower costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single PMIC is used to handle diversified customer requirements, then the variety of PMIC models increases to meet different needs, but the development costs increase significantly
Solution Approach 1:
The patent implements a master-slave PMIC configuration where a single PMIC model can serve multiple functions. The master PMIC controls and coordinates one or more slave PMICs of the same model, enabling a standardized PMIC design to handle diversified power supply requirements across different applications without needing to develop multiple specialized PMIC variants.
Solution Approach 2:
The system divides the power management functionality into separate master and slave PMIC units. The master PMIC handles control and coordination functions while slave PMICs handle specific power output functions. This segmentation allows each PMIC unit to remain simple and standardized while the overall system provides versatile power management capabilities.
2Productivity
If multiple PMICs transmit data signals simultaneously on the same transmission line, then data transmission speed increases, but data transmission conflicts occur
Solution Approach 1:
The patent implements a feedback mechanism where the master PMIC monitors the transmission line for data signals and provides feedback control. When the master PMIC detects a data signal from a slave PMIC, it can control the timing and coordination of other slave PMICs to avoid simultaneous transmission conflicts, ensuring reliable data communication while maintaining efficient transmission.
Solution Approach 2:
The master PMIC performs preliminary coordination and timing control before data transmission occurs. By pre-coordinating transmission timing and managing the transmission schedule, the system prevents conflicts before they occur, allowing multiple PMICs to transmit data efficiently without compromising reliability.
Data Source
AI summary
A power supply system of the present disclosure includes a single first semiconductor integrated circuit (IC), at least one second semiconductor IC, a first transmission line and a second transmission line. Each of the single first semiconductor IC and the at least one second semiconductor IC includes at least one output terminal configured to output an output voltage. The single first semiconductor IC is configured to supply a clock signal to the at least one second semiconductor IC via the first transmission line. Based on the clock signal, one of the single first semiconductor IC and the at least one second semiconductor IC is configured to transmit a data signal via the second transmission line to another one.