PMIC Integration in Processor Package Lid Reduces Solder Noise
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Solution Overview
Problem
Conventional processor packages experience noise issues at solder bumps due to the separate location of the power management integrated circuit (PMIC) from the processor package, leading to inefficient pin allocation for power rails.
Innovation Solution
Integrating the PMIC within the processor package using a patterned lid, which reduces noise by minimizing the distance between the processor and auxiliary modules, and allows for reduced pin count through higher voltage and lower current input configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of repair
If the PMIC is mounted at a distance from the processor package, then it can be easily removed if it fails, but noise is present at the solder bump or solder joint where the processor die is mounted to the substrate
Solution Approach 1:
The package is segmented into multiple functional areas: the processor die mounted on the substrate, the PMIC mounted on the substrate at a distance, and the lid that covers the package. This segmentation allows the PMIC to be separately mounted and potentially removed while maintaining electrical connectivity through the substrate, thus facilitating repair while managing noise through spatial separation and controlled impedance paths.
2Ease of repair
If the PMIC is mounted at a distance from the processor package, then it can be easily removed if it fails, but a significant number of package pins are allocated for processor power rails
Solution Approach 1:
The substrate acts as an intermediary between the processor die and the PMIC. It provides separate mounting locations for both components while maintaining independent electrical connectivity. The substrate's trace network serves as an intermediate power distribution system, allowing the PMIC to be positioned remotely without requiring additional pins on the processor package, thus reducing overall device complexity.
3Object-affected harmful factors
If the PMIC is integrated into the processor package, then noise is reduced at the solder joints, but the PMIC cannot be easily removed if it fails
Solution Approach 1:
Different regions of the package have different functional qualities: the area near the processor die is optimized for low-noise power delivery with the PMIC mounted nearby on the substrate, while the lid provides a separate structural element that could potentially facilitate PMIC removal. The substrate's trace routing is designed with local impedance control to minimize noise while allowing the PMIC to be positioned in a location that balances noise reduction with repairability.
4Power
If more package pins are allocated for processor power rails, then power delivery capability is improved, but device complexity increases
Solution Approach 1:
The power delivery architecture transitions from a two-dimensional pin-based interface to a three-dimensional layout where the PMIC is mounted on the substrate plane near the processor die. This spatial arrangement allows multiple power rails to be routed through the substrate's internal layers and trace network, providing enhanced power delivery capability without increasing the pin count on the processor package, thus avoiding increased device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Significantly reduces noise at solder joints and minimizes pin count by integrating PMIC within the processor package, enhancing thermal management and power distribution efficiency.
Implementation Method 1
Thermal interface material (TIM) may be disposed on the patterned lid and on at least one of the processor module or the auxiliary module
Data Source
AI summary
A hybrid package having a processor module disposed on a substrate and an auxiliary module disposed on a patterned lid. The auxiliary module may be a memory module, a power management integrated circuit (PMIC) module, and/or other suitable module, that are located in the package along with the processor module. Having the auxiliary module in the package with the processor module reduces the noise at the solder bump between the processor module and the substrate. Having the auxiliary module in the package with the processor module also allows other modules to be added to the package without increasing the area of the package.