Dynamic PMIC Load Switch Biasing for Low-Power Gate Drive
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Solution Overview
Problem
Power management integrated circuits (PMICs) in memory systems, such as Solid-State Drives (SSDs), face significant power consumption issues due to continuous gate charging in load switch drivers, especially during low power or sleep modes, which exacerbates in-rush currents and inefficient power management.
Innovation Solution
A dynamically biasing load switch driver in PMICs that adjusts operational frequency by initially using a high frequency to rapidly turn on the FET switch and then reduces frequency once saturated, minimizing power consumption by trickle charging the gate voltage, thereby reducing overall power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If continuous gate charging is used in load switch driver, then the switch can be reliably turned on, but power consumption increases significantly during low power modes
Solution Approach 1:
The patent implements dynamic biasing that adjusts the operational frequency of the load switch driver based on the state of the power domain. During transitions, the driver operates at full frequency to ensure reliable switch turn-on. Once the power domain is fully powered up, the driver automatically reduces to a lower frequency or enters sleep mode, thereby eliminating continuous full-power gate charging while maintaining switch reliability.
Solution Approach 2:
The patent changes the operational parameters (frequency and bias current) of the load switch driver dynamically. The driver transitions from a high-frequency full-power state during power-up to a low-frequency or stopped state during steady operation. This parameter adjustment resolves the contradiction by providing high reliability during critical transitions while minimizing power consumption during normal operation.
2Speed
If high frequency operation is used to rapidly turn on FET switch, then power-up speed is improved, but power consumption increases
Solution Approach 1:
The patent employs periodic action by using high-frequency operation only during the brief power-up transition period when the FET switch needs to be turned on rapidly. Once the switch is fully conductive and the power domain is powered up, the driver transitions to low-frequency or idle operation. This temporal separation of high-speed operation from continuous operation achieves fast power-up without sustained high power consumption.
Solution Approach 2:
The operational frequency is made dynamic rather than static. The driver automatically adjusts frequency based on operational phase: high frequency during power-up transitions to ensure rapid FET turn-on, then automatically reduces to low frequency or stops during steady state. This dynamic adaptation resolves the speed-power consumption tradeoff.
Data Source
AI summary
Disclosed is an improved load switch driver for Power Management Integrated Circuit (PMIC) devices. In one embodiment, a PMIC is disclosed comprising a gate driver, the gate driver connected to the gate of a switch; an operation frequency generator connected to the gate driver and configured to supply a periodic voltage to the gate driver; and a voltage sensor, the voltage sensor connected to the operation frequency generator and the source of the switch, the voltage sensor configured to monitor a drain-source voltage of the switch and lower the frequency of the operation frequency generator to a second frequency in response to detecting a collapse of the drain-source voltage.