PMIC Power Tracker for Multi-LDO Voltage Loss Reduction
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Solution Overview
Problem
Power management integrated circuits (PMICs) face inefficiencies due to significant power loss caused by large differences between input and output voltages of low dropout regulators (LDOs), which can lead to increased power consumption and reduced performance in battery-operated devices.
Innovation Solution
The implementation of a power management integrated circuit that includes a power tracker to aggregate offset voltages with selection signals from multiple LDOs, generating a reference voltage to minimize the difference between input and output voltages, thereby reducing power loss. This is achieved through a sub-regulator that provides an optimized input voltage to the LDOs based on the tracked output signals, maintaining a constant voltage difference and minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If LDOs use battery voltage or directly input voltage to the PMIC, then the input voltage is sufficient for operation, but power loss increases due to large difference between input and output voltages
Solution Approach 1:
A sub-regulator is introduced as an intermediary component between the battery/PMIC input and the LDOs. The sub-regulator first converts the high input voltage to an intermediate voltage level, which then serves as the input for the LDOs. This intermediary voltage conversion step reduces the voltage difference that the LDOs must handle, thereby minimizing power loss while maintaining manageable voltage regulation complexity through staged conversion.
Solution Approach 2:
The voltage regulation process is segmented into two distinct stages: first, a sub-regulator performs initial voltage conversion from the battery/PMIC input voltage to an intermediate voltage; second, multiple LDOs perform final voltage regulation from the intermediate voltage to their respective output voltages. This segmentation allows each stage to operate more efficiently, with the LDOs handling smaller voltage drops and thus reducing overall power loss.
2Loss of energy
If multiple LDOs use different input voltages, then each LDO can be optimized for its specific output, but power loss increases due to unoptimized input-output voltage differences
Solution Approach 1:
A power tracker circuit is implemented that continuously monitors the output voltages of multiple LDOs and provides feedback to control the sub-regulator's output voltage. The power tracker identifies which LDO is currently drawing the most current and adjusts the sub-regulator's output to optimize the input voltage for that specific LDO, thereby minimizing power loss across the system while automatically coordinating voltage supply without complex manual intervention.
Data Source
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AI summary
A power management integrated circuit including: a first regulator configured to provide a first output signal to a component; a second regulator configured to provide a second output signal to the component; a third regulator configured to provide a third output signal to the component; a power tracker configured to track first, second and third output signals, aggregate an offset voltage with a selection signal, and generate a reference voltage, wherein the selection signal corresponds to one of the first, second and third output signals; and a sub-regulator configured to generate an input voltage corresponding to the reference voltage and provide the generated input voltage to the first, second and third regulators.