PMIC Power Tracker Circuit for Low-Loss Multi-LDO Regulation
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Solution Overview
Problem
Power management integrated circuits (PMICs) face inefficiencies due to significant power loss caused by large differences between input and output voltages of low dropout regulators (LDOs), which affects the operation of electronic devices.
Innovation Solution
The implementation of a power management integrated circuit that includes a power tracker to aggregate offset voltage with a selection signal, generating a reference voltage and providing it to sub-regulators to minimize power loss by maintaining a constant difference between input and output voltages of LDOs, thereby optimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If LDOs use battery voltage or directly input voltage as power source, then they can provide sufficient input voltage to maintain regulation, but power loss increases significantly due to large voltage difference
Solution Approach 1:
The patent dynamically changes the input voltage parameter of LDOs by introducing a sub-regulator that adjusts its output voltage based on the LDO's output voltage and current. This parameter adjustment reduces the voltage difference across the LDO, thereby minimizing power loss while maintaining adequate input voltage for stable regulation operation.
2Loss of energy
If LDOs use output voltage of sub-regulator as input power source, then power loss is minimized by reducing voltage difference, but the system complexity increases due to additional control circuits
Solution Approach 1:
The patent merges the power tracking function with the sub-regulator control by having the sub-regulator's reference voltage dynamically track the LDO's output voltage. This integration allows the sub-regulator to automatically adjust its output to maintain optimal voltage difference across the LDO, reducing power loss without requiring separate complex control circuits.
Solution Approach 2:
The patent implements a feedback mechanism where the sub-regulator continuously monitors the LDO's output voltage and current, and adjusts its own output voltage accordingly. This feedback loop enables dynamic optimization of the voltage difference, minimizing power loss while using simple control logic that does not significantly increase system complexity.
3Reliability
If multiple LDOs are used to supply different blocks, then each block receives appropriate voltage with low noise, but overall power consumption increases due to multiple voltage regulation paths
Solution Approach 1:
The patent makes the sub-regulator universal by having it supply input power to multiple LDOs simultaneously. The sub-regulator dynamically adjusts its output to track the highest voltage requirement among all connected LDOs, allowing a single sub-regulator to serve multiple voltage regulation paths. This multi-functionality reduces overall power consumption compared to having separate sub-regulators for each LDO, while maintaining low-noise voltage supply quality for each block.
Data Source
AI summary
A power management integrated circuit including: a first regulator configured to provide a first output signal to a component; a second regulator configured to provide a second output signal to the component; a third regulator configured to provide a third output signal to the component; a power tracker configured to track first, second and third output signals, aggregate an offset voltage with a selection signal, and generate a reference voltage, wherein the selection signal corresponds to one of the first, second and third output signals; and a sub-regulator configured to generate an input voltage corresponding to the reference voltage and provide the generated input voltage to the first, second and third regulators.