PMIC Register File Write Protection via WRB and Stop Bit
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Solution Overview
Problem
Current Power Management Integrated Circuits (PMIC) rely on external microcontrollers for write protection, introducing latency, complexity, and increased costs, as well as expanding the error and attack surface.
Innovation Solution
Incorporating a write register bit (WRB) within the PMIC's register file to enable direct access for write operations, eliminating the need for additional circuitry and using a stop bit to revert to read-only mode after writing, thus preventing unauthorized access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an external microcontroller is used to prevent unauthorized write to the PMIC device, then security is improved, but latency is increased and manufacturing complexity increases
Solution Approach 1:
The patent merges the security function with the PMIC register file by integrating a write protection mechanism directly into the PMIC device. The write protection bit is stored within the register file structure itself, eliminating the need for an external microcontroller and reducing system latency while maintaining security.
Solution Approach 2:
The patent extracts the security function from the external microcontroller and embeds it directly into the PMIC register file. By taking out the security logic from the external component and integrating it into the internal register structure, the system achieves both security and reduced latency.
2Reliability
If an external microcontroller is used to monitor write requests, then unauthorized access is prevented, but device complexity increases
Solution Approach 1:
The patent combines the write protection functionality with the existing PMIC register file structure. The write protection bit is integrated into the register file's internal architecture, merging security functions with the existing device structure and eliminating the need for additional external components.
Solution Approach 2:
The PMIC register file is designed to serve multiple functions: storing control registers and simultaneously providing write protection capabilities. This multi-functionality eliminates the need for separate security components, reducing manufacturing complexity while maintaining security.
3Reliability
If an external microcontroller is used for write protection, then unauthorized writes are blocked, but cost increases
Solution Approach 1:
The patent merges the security function into the PMIC device itself, eliminating the need for separate external microcontrollers. This integration reduces component count and manufacturing costs while maintaining the security function through the integrated write protection bit.
Solution Approach 2:
The patent uses a simple write protection bit stored in the register file structure, which is a minimal-cost hardware element compared to an external microcontroller. This approach provides security at a fraction of the cost of using external components.
4Adaptability or versatility
If an external microcontroller is used to control PMIC operations, then programmable control is achieved, but the error surface and attack surface increase
Solution Approach 1:
The patent extracts the security-critical write protection function from the external microcontroller and embeds it directly into the PMIC device. This removal of the external microcontroller's security responsibilities reduces the attack surface while maintaining programmable control capabilities through the integrated register file.
Solution Approach 2:
The patent combines the control function with the PMIC device by integrating the write protection mechanism into the register file. This merging eliminates the need for external microcontrollers, reducing the error and attack surfaces while preserving programmable control through the PMIC's native interface.
Data Source
AI summary
Disclosed are devices and methods for protecting the register file of a power management integrated circuit (PMIC). In one embodiment, a device is disclosed comprising: a register file comprising a plurality of a registers, at least one register in the register file containing a write register bit (WRB); and an interface configured to receive messages from a host application, the messages including a WRB enablement signal, wherein the device is configured to enable writing to the register file in response to receiving the WRB enablement signal over the interface, write data in response to write messages while writing to the register file is enabled, and disable writing to the register file in response to receiving a stop bit over the interface.


