PMIC Regulator DVS Loop for Voltage Reversal-Free Power-Off
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Solution Overview
Problem
Power management integrated circuits (PMICs) face challenges in preventing voltage reversal phenomena during power-off sequences, especially when discharge times differ for each power rail, leading to inefficiencies and potential glitches.
Innovation Solution
Incorporating a dynamic voltage scaling (DVS) loop that drops the regulation voltage to a threshold voltage, controlled by a processor, and then turning off power transistors to manage voltage levels across multiple power rails, thereby preventing voltage reversal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If power transistors are turned off immediately during power-off sequence, then power-off time is reduced, but voltage reversal phenomenon occurs between power rails with different discharge times
Solution Approach 1:
The DVS circuit is activated before turning off the power transistor to pre-drop the output voltage to a target voltage level. This preliminary action ensures that when the power transistor is subsequently turned off, the output voltage does not reverse relative to other power rails, thus preventing voltage reversal phenomena while maintaining fast power-off sequencing.
2Reliability
If DVS circuit is used to drop voltage before power-off, then voltage reversal is prevented, but device complexity increases
Solution Approach 1:
The DVS circuit is designed to serve multiple functions: it acts as a voltage dropping circuit during power-off sequences to prevent voltage reversal, and simultaneously functions as part of the normal voltage regulation system during operation. This multi-functionality reduces the need for separate dedicated components, thereby limiting the increase in device complexity.
Solution Approach 2:
The DVS circuit serves as an intermediary between the power transistor and the load during power-off sequences. It mediates the voltage transition by providing a controlled discharge path that prevents direct voltage reversal, thus protecting the system while managing the complexity through a focused intermediate component rather than system-wide changes.
3Adaptability or versatility
If different discharge times are used for each power rail, then power management flexibility is improved, but voltage reversal and glitches occur between power rails
Solution Approach 1:
The solution applies local quality by implementing voltage control specifically at the output nodes of power rails that are prone to voltage reversal. The DVS circuit is selectively engaged for individual power rails based on their discharge characteristics, allowing differentiated discharge times for flexibility while locally preventing voltage reversal through targeted voltage dropping action.
Data Source
AI summary
A regulator includes a reference voltage generation circuit generating a second reference voltage varied from a first reference voltage according to a dynamic control signal, an error amplifier configured to generate an error voltage based on the second reference voltage and a regulation voltage at an output node, a power transistor including a gate terminal connected to the error amplifier and receiving an input voltage to output the regulation voltage to the output node based on the error voltage, a dynamic voltage scaling (DVS) circuit connected to the reference voltage generation circuit and the output node and dropping the regulation voltage to the second reference voltage, and a control circuit receiving a power-off signal from a processor and turning off the power transistor when the regulation voltage drops to the second reference voltage by the DVS circuit.