Delay-Compensating PMIC Timing Alignment for Power Envelopes
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Solution Overview
Problem
Existing power management circuits in mobile communication devices often experience misalignment between time-variant target voltages and power envelopes, leading to amplitude clipping and distortion during signal amplification due to delays in communication buses.
Innovation Solution
A delay-compensating power management circuit that includes a voltage processing circuit to determine and adjust temporal offsets between time-variant power envelopes and target voltages, ensuring alignment through the generation of a modified target voltage, thereby reducing distortions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the transceiver circuit sends the time-variant target voltage to the power management circuit via a communication bus, then the power management circuit can generate the supply voltage based on the target voltage, but the time-variant target voltage becomes misaligned from the time-variant power envelope due to transmission delays
Solution Approach 1:
The voltage processing circuit performs preliminary timing adjustment on the time-variant target voltage before it is used to generate the supply voltage. By measuring the temporal offset between the target voltage and power envelope and applying compensatory delay or advance, the system pre-corrects the timing misalignment, ensuring that the supply voltage remains synchronized with the power envelope despite communication bus delays.
2Device complexity
If the power management circuit uses the time-variant target voltage directly without adjustment, then the circuit operation is simple, but amplitude clipping and distortion occur during signal amplification
Solution Approach 1:
The voltage processing circuit implements a feedback mechanism where the temporal offset between the time-variant target voltage and the actual power envelope is continuously measured and monitored. Based on this feedback information, the circuit dynamically adjusts the timing of the target voltage to minimize the offset, thereby preventing amplitude clipping and distortion while maintaining accurate synchronization between the supply voltage and power envelope.
3Productivity
If the supply voltage is not time-aligned with the power envelope, then the power management circuit operation is simpler, but signal distortion and clipping occur during amplification
Solution Approach 1:
The system performs preliminary timing correction by measuring the temporal offset between the target voltage and power envelope, then applying compensatory timing adjustment before the supply voltage is generated. This pre-correction ensures that the supply voltage is properly synchronized with the power envelope, preventing signal distortion and clipping while maintaining efficient power amplifier operation.
Data Source
AI summary
A delay-compensating power management circuit is provided. The power management circuit includes a power management integrated circuit (PMIC) configured to generate a time-variant voltage(s) based on a time-variant target voltage(s) for amplifying an analog signal(s) associated with a time-variant power envelope(s). A voltage processing circuit is provided in the power management circuit to determine a temporal offset, which can be positive or negative, between the time-variant power envelope(s) and the time-variant target voltage(s). Accordingly, the voltage processing circuit modifies the time-variant target voltage(s) to substantially reduce the determined temporal offset and thereby realign the time-variant target voltage(s) with the time-variant power envelope(s). By realigning the time variant target voltage(s) with the time-variant power envelope(s), it is possible to align the time-variant voltage(s) with the time-variant power envelope(s) to reduce distortions (e.g., amplitude clipping) during amplification of the analog signal.