Memory Device PMIC Voltage Scaling for Power Efficiency
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Solution Overview
Problem
Conventional memory devices often operate within standardized voltage ranges, which can limit their power efficiency and performance, as they may not always satisfy performance thresholds when supplied with default voltages, leading to suboptimal power consumption and reliability.
Innovation Solution
A power management integrated circuit (PMIC) is used to provide supply voltages outside the defined voltage range to memory devices, allowing for reduced power consumption or enhanced performance by adjusting voltages to either below or above the standard range, depending on the memory die's characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If memory devices operate within standardized voltage ranges, then manufacturing and compatibility are simplified, but power efficiency and performance are limited
Solution Approach 1:
The patent applies parameter changes by allowing memory devices to operate at voltages outside the standardized range. Specifically, the system enables voltage scaling to below-standard voltages (e.g., 1.0V or lower for DDR4) to reduce power consumption, while still maintaining acceptable performance through optimized memory die characteristics and control circuitry.
2Adaptability or versatility
If memory devices operate within standardized voltage ranges, then compatibility is ensured, but performance thresholds may not be satisfied
Solution Approach 1:
The patent applies local quality by allowing different memory dies within the same module to have different voltage characteristics. Some memory dies are designed to operate at lower voltages (e.g., 1.0V) while others operate at standard voltages, and the system manages this heterogeneity through individual voltage control for each die, enabling optimized performance for each component while maintaining overall system compatibility.
3Loss of energy
If supply voltage is reduced below defined range, then power consumption decreases, but reliability may be compromised
Solution Approach 1:
The patent implements feedback mechanisms where the system monitors memory die performance and voltage characteristics in real-time. Based on this feedback, the system dynamically adjusts operating parameters such as clock speeds, timing settings, and voltage levels to ensure that each memory die operates reliably at its selected voltage, preventing errors while maintaining low power consumption.
4Productivity
If voltage range is expanded beyond standard, then performance can be enhanced, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the voltage management function into separate, independent control circuits for each memory die. Each die has its own voltage control mechanism that can be independently configured, allowing the system to manage multiple voltage levels without requiring a monolithic complex controller. This modular approach reduces overall system complexity while enabling enhanced performance through optimized voltage selection.
Data Source
AI summary
Methods, systems, and devices for power management for a memory device are described. For example, a memory device may include one or more memory dies and may be configured to operate using a first supply voltage and a second supply voltage. The first supply voltage may be associated with a first defined voltage range, and the second supply voltage may be associated with a second defined voltage range. The memory device may include a power management integrated circuit (PMIC) that is coupled with the one or more memory dies and provides the supply voltages to the one or more memory dies. The PMIC may be configured to provide, to the one or more memory dies, a first voltage that is within the first defined voltage range as the first supply voltage and a second voltage that is outside the second defined voltage range as the second supply voltage.