PMOS Metal Stack Blocking Layer for Threshold Voltage Stability
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Solution Overview
Problem
The deposition of an N-metal layer on a P-metal stack in PMOS transistors causes a significant threshold voltage shift, limiting device performance, and existing solutions either fail to inhibit N-metal layer growth or degrade overall device performance.
Innovation Solution
A method involving the formation of a P-metal stack and an N-metal stack on a semiconductor substrate, where a blocking compound is used to selectively deposit a blocking layer on the P-metal layer, thereby inhibiting the growth of the N-metal layer on the P-metal stack.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If an N-metal layer is deposited on a P-metal stack in conventional PMOS transistor fabrication, then the transistor density and functionality are improved, but the threshold voltage shifts significantly toward mid-gap by more than 100 mV, degrading device performance
Solution Approach 1:
A blocking layer is introduced as an intermediary between the N-metal layer and the P-metal stack. This blocking layer prevents direct interaction between the N-metal and P-metal surfaces, thereby preventing the harmful threshold voltage shift while still allowing the N-metal layer to be deposited for its intended functionality in other device regions.
Solution Approach 2:
The blocking layer is deposited in advance on the P-metal stack surface before the N-metal layer deposition process. This preliminary action creates a protective barrier that prevents the N-metal from causing threshold voltage shift, allowing the N-metal layer to be deposited without harm to the PMOS transistor performance.
2Reliability
If a new P-type metal is used instead of an N-metal layer on the TiN surface to eliminate Vt shift, then the threshold voltage stability is improved, but the overall device performance degrades compared to titanium nitride (TiN)
Solution Approach 1:
Rather than replacing the optimal TiN P-metal material with a suboptimal P-type metal, a blocking layer is used as an intermediary. This approach preserves the superior electrical properties of TiN while preventing the harmful interaction with the N-metal layer, thus maintaining both high device performance and threshold voltage stability.
Solution Approach 2:
The surface properties of the P-metal stack are temporarily modified by depositing a blocking layer, which changes the interface characteristics to prevent N-metal adsorption. After N-metal deposition, the blocking layer can be removed, restoring the original TiN surface properties and avoiding the performance degradation associated with using alternative P-type metals.
3Object-affected harmful factors
If existing approaches use a new P-type metal on TiN surface to prevent N-metal layer growth, then the N-metal layer growth is inhibited, but the detrimental effects of the N-metal layer are not completely eliminated and device performance degrades
Solution Approach 1:
A specifically designed blocking layer serves as an effective intermediary that completely prevents N-metal layer growth on the P-metal stack. This blocking layer provides superior protection compared to using alternative P-type metals, completely eliminating the harmful effects of N-metal adsorption while preserving the excellent electrical properties of the TiN-based P-metal stack.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the growth of N-metal layers on PMOS transistors, thereby improving threshold voltage and overall device performance without the need for new P-type metals.
Implementation Method 1
exposing the semiconductor substrate to a blocking compound to selectively deposit a blocking layer on the P-metal layer
Implementation Method 2
depositing an interfacial layer on the top surface of the channel, depositing a high-K dielectric layer on the interfacial layer, and depositing a P-metal layer on the high-K dielectric layer
Data Source
AI summary
Methods of manufacturing electronic devices, such as transistors (negative metal-oxide-semiconductor (NMOS) transistors (e.g., an N-metal stack) and positive metal-oxide-semiconductor (PMOS) transistors (e.g., a P-metal stack)) are described. Embodiments of the disclosure are directed to methods of improving PMOS transistor performance by inhibiting N-metal layer growth. The present disclosure provides two types of processes to reduce or inhibit N-metal layer growth. The disclosure provides methods which include forming a self-assembled monolayer (SAM) on the metal surface (e.g., titanium nitride (TiN)) of the PMOS, and methods which include forming a silicon-containing layer such as silicon oxide (SiOx) on the TiN surface. These two types of processes significantly reduce or inhibit the subsequent growth of an N-metal layer, such as titanium aluminum carbide (TiAlC), on the TiN surface of the PMOS.