PMOS Bulk Switching Circuit With Voltage Isolation for Latch-Up Prevention

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Solution Overview

Problem

Existing switching circuits for PMOS transistor bulk fail to maintain switching functionality when power supply voltage exceeds the normal withstand voltage range, leading to potential device breakdown and latch-up effects.

Innovation Solution

A low power consumption switching circuit with voltage isolation function for PMOS transistor bulk, comprising a bulk voltage switching control unit and a bulk voltage switching unit, utilizing multiple PMOS transistors and weak pull-down devices to automatically switch the bulk voltage output terminal between input terminals, ensuring connection to a higher potential and maintaining safe voltage ranges.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a simple switching circuit with two diodes is used for PMOS transistor bulk, then the circuit complexity is reduced, but the voltage difference resolution is insufficient and latch-up effect may occur when voltage difference is lower than the PN junction threshold voltage

Engineering Contradiction:
Improvecircuit complexityVSAvoidswitching reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent divides the bulk voltage switching circuit into multiple PMOS transistors (first PMOS transistor, second PMOS transistor, third PMOS transistor) with different threshold voltages, where each transistor handles a specific voltage range. This segmentation allows the circuit to achieve fine-grained voltage difference resolution while maintaining reliability, as each transistor operates in its optimal voltage range.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes PMOS transistors with different threshold voltages (VTH1, VTH2, VTH3) to create multiple switching stages. By changing the threshold voltage parameter across different transistors, the circuit can detect and respond to small voltage differences that would be below the threshold of a single diode-based circuit, thereby improving both resolution and reliability.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a switching circuit with multiple PMOS transistors and weak pull-down devices is used to improve voltage difference resolution, then the switching reliability is improved, but the circuit complexity increases

Engineering Contradiction:
Improveswitching reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple PMOS transistors with different threshold voltages and weak pull-down devices into a unified bulk voltage switching circuit. The transistors are connected in parallel with their sources connected to different voltage inputs (VCC, VSPAD) and drains connected to the bulk output terminal. This merging approach allows the circuit to achieve high reliability through voltage comparison across multiple stages while maintaining a relatively compact structure.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The weak pull-down devices automatically activate when the bulk voltage exceeds the normal withstand voltage range, providing self-protection without requiring external control. The circuit uses its own internal components (PMOS transistors with different VTH values) to automatically switch and isolate excessive voltage, making the circuit self-regulating and reducing the need for additional control logic.

Inventive Principle:
Principle #25Self-service

3Device complexity

If the bulk voltage switching circuit does not include voltage isolation function, then the circuit design is simpler, but the device is prone to breakdown when power supply voltage exceeds the normal withstand voltage range

Engineering Contradiction:
Improvecircuit design simplicityVSAvoidwithstand voltage capability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent incorporates voltage isolation functionality into the bulk voltage switching circuit by using PMOS transistors with different threshold voltages that automatically activate at different voltage levels. When the bulk voltage approaches or exceeds the withstand voltage range, the appropriate transistor switches to isolate the excessive voltage before it can cause breakdown. This preliminary protective action occurs automatically without requiring external detection or intervention.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The PMOS transistors with different threshold voltages act as intermediaries between the power supply voltage inputs and the bulk output terminal. These transistors selectively conduct or block voltage based on their threshold characteristics, providing gradual voltage isolation and protection. The weak pull-down devices serve as additional intermediaries to ensure the bulk voltage remains within safe limits by providing a discharge path when needed.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11418171B2Low power consumption switching circuit with voltage isolation function for PMOS transistor bulk, and integrated chip
Publication Date: 2022.08.16 GREE ELECTRIC APPLIANCE INC OF ZHUHAI
  • US11418171B2 patent drawing
  • US11418171B2 patent drawing
  • US11418171B2 patent drawing

AI summary

Disclosed is a low power consumption switching circuit with voltage isolation function for a PMOS transistor bulk, including a bulk voltage switching control unit, a bulk voltage switching unit, a first voltage input terminal, a second voltage input terminal, and a bulk voltage output terminal. The bulk voltage switching control unit includes a plurality of PMOS transistors and weak pull-down devices, and is configured to generate a control signal to control the bulk voltage switching unit to make the bulk voltage output terminal to be connected to a higher potential between the first voltage input terminal and the second voltage input terminal. The bulk voltage switching unit includes a plurality of PMOS transistors, and is configured to connect bulks of the PMOS transistors to the higher potential between the first voltage input terminal and the second voltage input terminal. Each of the PMOS transistors is a low-withstand-voltage device.