PMOS Bus Capacitor Control for Smaller AC-DC Adapters
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Solution Overview
Problem
The miniaturization of universal mobile phone chargers is hindered by the large size of electrolytic capacitors needed to stabilize AC-DC conversion, which also poses inefficiencies when used with non-specific mobile phone types due to the transmission of secondary pulsating power harmonics.
Innovation Solution
An adapter circuit incorporating a PMOS power transistor and a sampling control module, where the PMOS power transistor is connected in series with a bus capacitor, and the sampling control module controls the on-off state based on AC mains input voltage and power-down voltage to reduce bus capacitance and prolong AC mains power supply duration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large electrolytic capacitors are installed to smooth out transient power difference during AC-DC conversion, then the stability and efficiency of charging is improved, but the volume of the adapter increases
Solution Approach 1:
The patent changes the operating parameters of the capacitor by using a controller to dynamically adjust the switching state of the transistor connected in parallel with the capacitor. This allows the capacitor to operate in different modes (charging, discharging, bypassing) during different phases of the AC cycle, reducing the required capacitance value while maintaining voltage stability. The controller adjusts the duty cycle and switching timing to optimize capacitor utilization, enabling smaller capacitance to achieve the same smoothing effect.
Solution Approach 2:
The patent introduces a transistor as an intermediary component connected in parallel with the capacitor, controlled by a microcontroller. This intermediary actively manages the capacitor's charging and discharging processes, allowing precise control over when the capacitor stores or releases energy. The transistor acts as a switch that can bypass the capacitor during certain phases and engage it during others, optimizing its function while reducing the required capacitance value and overall adapter volume.
2Productivity
If large electrolytic capacitors are used to ensure stable power conversion, then the charging efficiency is improved, but the miniaturization of the charger is hindered
Solution Approach 1:
The patent dynamically changes the operational parameters of the capacitor system by controlling the transistor switching states throughout the AC cycle. During voltage peaks, the transistor bypasses the capacitor; during zero-crossing regions, the capacitor is actively engaged for energy storage. This dynamic parameter adjustment allows the system to maintain high charging efficiency while using significantly smaller capacitance values, enabling charger miniaturization without sacrificing productivity.
Solution Approach 2:
The patent implements periodic switching control of the transistor based on the AC voltage cycle phases. The controller periodically switches the transistor on and off at specific intervals corresponding to the AC waveform characteristics (peak, zero-crossing, negative half-cycle). This periodic action optimizes capacitor utilization throughout each AC cycle, maintaining efficient power conversion while reducing the required capacitor size for miniaturized charger design.
3Stability of the object's composition
If large capacitance values are used to handle transient power differences, then the power stability is improved, but the device complexity increases
Solution Approach 1:
The patent introduces a transistor as an active intermediary component that mediates between the capacitor and the rest of the circuit. This transistor, controlled by a microcontroller, actively manages power flow through the capacitor during different AC phases. The intermediary transistor enables precise control over capacitor engagement and bypassing, maintaining power stability while using smaller capacitance values, thereby reducing overall device complexity compared to using large passive capacitors.
Solution Approach 2:
The patent implements feedback control through a microcontroller that monitors the AC voltage waveform and dynamically adjusts the transistor switching states. The controller detects voltage peaks, zero-crossings, and negative half-cycles, and provides real-time feedback control to optimize capacitor utilization. This feedback mechanism maintains power stability by ensuring the capacitor is engaged only when necessary, reducing the required capacitance value and simplifying the overall circuit design while maintaining stable power conversion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces the volume of the bus capacitor while maintaining output power, improves charging efficiency, and ensures universal applicability by managing energy storage effectively.
Implementation Method 1
a bus capacitor C0, a PMOS power transistor Q1... simultaneously supplying power to a bus capacitor and a subsequent load by AC mains in an initial state, where the bus capacitor stays in a charging state in the initial state
Data Source
AI summary
The present disclosure provides an adapter circuit including a bus capacitor, a PMOS power transistor, and a sampling control module; a positive terminal of the bus capacitor is connected to a DC bus voltage, and a negative terminal of the bus capacitor is connected to a drain of the PMOS power transistor; a gate of the PMOS power transistor is connected to a drive signal, and a source of the PMOS power transistor is grounded; the sampling control module is used to obtain the drive signal by detecting an AC mains input voltage and a power-down voltage when the bus discharges, so as to turn off the PMOS power transistor after the AC mains input voltage reaches a peak value, and turn on the PMOS power transistor after the power-down voltage reaches a set voltage; the drive signal includes a PMOS Turn-on signal and a PMOS Turn-off signal.