pMOS Charge Transfer Circuit for Isolated Power Converter Bypass Capacitor

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Solution Overview

Problem

Existing isolated power converters face challenges in efficiently regulating the voltage across the bypass capacitor, leading to potential discharging issues and inefficiencies in maintaining a stable operating voltage for secondary controller circuits, especially when the output voltage drops.

Innovation Solution

The implementation of a charge transfer circuit with pMOS transistors and a charging control circuit that enables/disables charge transfer between the output voltage terminal and the bypass terminal, maintaining a bypass voltage within 0.2-0.4 V of the output voltage, using body diodes to prevent discharging, and controlling the states of the pMOS transistors based on sensed voltages to regulate the bypass capacitor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a bypass capacitor is used to supply operating power to secondary controller circuits, then the circuits can maintain operation during voltage fluctuations, but the capacitor may discharge when output voltage drops, leading to unreliable voltage regulation

Engineering Contradiction:
Improvevoltage regulation reliabilityVSAvoidcapacitor discharging
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A charge transfer circuit is introduced as an intermediary between the output voltage terminal and the bypass capacitor. This circuit includes pMOS transistors and body diodes that actively control charge transfer to the capacitor while preventing discharge, thereby protecting the capacitor from harmful discharging effects while maintaining reliable voltage supply to secondary controller circuits

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The charge transfer circuit proactively prevents discharging by using body diodes oriented to block reverse current flow and by controlling pMOS transistor states to ensure the capacitor only charges when output voltage is sufficient. This preliminary protective action occurs before any harmful discharge can affect the capacitor, maintaining voltage regulation reliability

Inventive Principle:
Principle #9Preliminary anti-action

2Stability of the object's composition

If charge transfer is continuously enabled to maintain bypass voltage, then voltage stability is improved, but energy loss increases due to unnecessary charging when output voltage is already sufficient

Engineering Contradiction:
Improvebypass voltage stabilityVSAvoidcharging energy loss
Core Design Contradiction:
Stability of the object's compositionVSLoss of energy

Solution Approach 1:

The charging control circuit implements feedback by continuously monitoring both the output voltage and the bypass capacitor voltage. Based on this feedback, the circuit intelligently controls the charge transfer process, enabling it only when the output voltage exceeds the bypass voltage by a sufficient margin, thereby maintaining voltage stability while minimizing unnecessary energy loss from continuous charging

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The charge transfer circuit dynamically adjusts its operation based on real-time voltage conditions. The pMOS transistors are controlled to enable or disable charge transfer path according to the voltage differential between output and bypass terminals, creating a dynamic system that optimizes between voltage stability and energy efficiency rather than operating in a fixed continuous charging mode

Inventive Principle:
Principle #15Dynamics

3Reliability

If the bypass voltage is maintained close to output voltage (within 0.2-0.4 V), then secondary controller circuits operate reliably, but the complexity of voltage control increases

Engineering Contradiction:
Improvesecondary controller operation reliabilityVSAvoidvoltage control circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The design establishes a specific voltage differential parameter (0.2-0.4 V) between output voltage and bypass voltage as the optimal operating condition. The charge transfer circuit is designed with pMOS transistors and body diodes configured to naturally maintain this parameter relationship, ensuring reliable secondary controller operation while managing control complexity through parameter optimization rather than complex control logic

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution ensures reliable voltage regulation for secondary controller circuits, preventing discharging and maintaining a stable bypass voltage, even when the output voltage drops, thereby enhancing the efficiency and reliability of the power converter.

Implementation Method 1

a charge transfer circuit with pMOS transistors and a charging control circuit that enables/disables charge transfer between the output voltage terminal and the bypass terminal

Methodology Applied
Scientific EffectCharge transfer: Electrical Accumulator

Implementation Method 2

using body diodes to prevent discharging

Methodology Applied
Scientific EffectDiode rectification: Diode

Data Source

PatentUS9178411B2Charging circuit for a power converter controller
Publication Date: 2015.11.03 POWER INTEGRATIONS INC
  • US9178411B2 patent drawing
  • US9178411B2 patent drawing
  • US9178411B2 patent drawing

AI summary

A controller includes a first controller terminal, a second controller terminal, a first p-channel metal-oxide-semiconductor field-effect transistor, and a second pMOS transistor. The first controller terminal is to be coupled to a bypass capacitor coupled to a secondary side of an isolated power converter. The second controller terminal to be coupled to an output node of the secondary side. The first pMOS transistor includes a first source terminal coupled to the second controller terminal, a first drain terminal, and a first body diode. The second pMOS transistor includes a second source terminal coupled to the first controller terminal, a second drain terminal coupled to the first drain terminal, and a second body diode. A cathode of the second body diode is coupled to the second source terminal. An anode of the second body diode is coupled to the second drain terminal.