PMOS-Like Fuse Element Structure for Low-Voltage Backup Activation
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Solution Overview
Problem
Current oxide fuses in memory devices have inefficient blowing processes due to high voltages and variability, leading to inaccurate and inefficient activation of backup units.
Innovation Solution
A fuse element with a structure similar to a PMOS, featuring a shallow trench isolation (STI) structure and a drain region configured to receive a stress voltage, which establishes a conductive path from the drain to the source region, allowing for the activation of backup units at lower stress signals without requiring external gate voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional oxide fuse structures are used, then the blowing process requires extremely high voltages, but this leads to process variation and decreased blowing efficiency
Solution Approach 1:
The patent changes the physical structure of the fuse element from a conventional oxide fuse to a PMOS transistor structure. This structural parameter change enables the fuse to operate at lower voltages while improving blowing efficiency. The PMOS structure with its specific channel, source, and drain regions allows for controlled conduction path formation without requiring extremely high voltages that cause process variation in conventional fuses.
Solution Approach 2:
The patent replaces the conventional oxide-based fuse mechanism with a semiconductor transistor mechanism. Instead of relying on oxide breakdown at high voltages, the invention uses field-effect transistor physics where a conductive path is formed through the channel between source and drain regions. This substitution of the underlying physical mechanism enables operation at lower, more stable voltages.
2Measurement precision
If conventional fuse structures are used, then the blowing process is inaccurate due to process variation, but this requires higher voltages to ensure activation
Solution Approach 1:
The patent changes the fuse structure to a PMOS transistor with precisely defined geometric parameters (channel width, channel length, source and drain regions). This structural standardization reduces process variation effects and improves blowing accuracy. The transistor structure allows for better control over the conduction path formation, enabling more precise and repeatable fuse activation at consistent voltage levels.
3Area of stationary object
If a PMOS-like fuse structure is used, then the manufacturing area can be reduced, but the structure becomes more complex
Solution Approach 1:
The patent uses a PMOS transistor structure that serves dual purposes: it functions as both the fuse element and a standard semiconductor device component. This multi-functionality allows the fuse to be integrated into existing semiconductor manufacturing processes and design libraries, reducing the need for separate fuse structures. The PMOS structure can be implemented using the same fabrication processes as other transistor-based circuits, thereby reducing overall manufacturing complexity despite the increased structural detail.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution reduces the required manufacturing area and enables efficient activation of backup units with a lower stress signal, improving the reliability and accuracy of fuse element operation compared to conventional fuses.
Implementation Method 1
accumulating electrons in a portion of the STI structure adjacent to the drain region
Implementation Method 2
generating a conductive path through the drain region and the source region so that the fuse element is conductive
Data Source
AI summary
A fuse element, a semiconductor device, and a method for activating a backup unit are provided. The fuse element includes an active area, which includes a source region and a drain region beside the source region, a gate region disposed on the active area, and a shallow trench isolation (STI) structure surrounding the active area. In addition, the drain region includes a terminal configured to receive a stress voltage, such that a conductive path is established through the drain region to the source region.


