PMOS LDO Active PSRR Stabilization
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Solution Overview
Problem
Conventional low dropout regulators with PMOS power transistors suffer from poor power supply rejection ratio (PSRR) due to input voltage fluctuations affecting the gate-source voltage, leading to instability and potential transistor burnout.
Innovation Solution
An active enhanced PSRR mechanism is introduced, which includes a feedback network, error amplifier, and an active PSRR unit that detects input voltage noise and adjusts the gate voltage of the PMOS power transistor to stabilize the gate-source voltage, thereby improving noise rejection and preventing transistor burnout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional LDO structure with PMOS power transistor is used, then device simplicity is maintained, but PSRR performance deteriorates due to input voltage fluctuations directly affecting gate-source voltage
Solution Approach 1:
The patent introduces an intermediary circuit (operational amplifier and control transistor) between the input voltage and the PMOS power transistor gate. This intermediary actively compensates for input voltage fluctuations by detecting them and adjusting the gate voltage accordingly, preventing direct coupling between input ripples and the power transistor's gate-source voltage, thus improving PSRR without significantly complicating the overall device structure
Solution Approach 2:
The patent implements a feedback mechanism where the operational amplifier continuously monitors the gate-source voltage of the PMOS power transistor and adjusts the gate voltage in response to detected variations. This closed-loop feedback system actively counteracts input voltage fluctuations, maintaining stable gate-source voltage and thereby enhancing PSRR performance
2Reliability
If input voltage fluctuation compensation is not implemented, then device complexity is low, but transistor reliability deteriorates due to potential burnout from excessive gate-source voltage
Solution Approach 1:
The patent applies preliminary action by proactively detecting input voltage fluctuations before they can cause excessive gate-source voltage and potential transistor burnout. The operational amplifier continuously monitors conditions and preemptively adjusts the gate voltage to prevent harmful voltage spikes, rather than reacting after damage occurs
Solution Approach 2:
The control transistor and operational amplifier serve as protective intermediaries between the input voltage source and the PMOS power transistor. This intermediary layer filters and regulates the control signal, preventing harmful voltage variations from reaching the power transistor's gate and causing burnout, thus enhancing transistor reliability
Data Source
AI summary
A low dropout regulator includes a PMOS power transistor, a feedback network, an error amplifier and an active enhanced PSRR unit. The PMOS power transistor has a first end coupled to an input voltage, and a second end coupled to a load and the feedback network. The error amplifier receives a feedback signal generated from the feedback network, compares the feedback signal with a reference voltage to generate a difference value, and amplifies the difference value to generate an error signal. The active enhanced PSRR unit has one end coupled to the first end, and another end coupled to a control end of the PMOS power transistor and the error amplifier, detects an input voltage of the first end, and correspondingly adjusts a voltage of the control end to stabilize a voltage between the control end and the first end according to a variation of the input voltage.