PMOS LDO Noise-Cancelling Circuit for Mid-Frequency PSRR
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional LDOs either require an additional higher voltage supply for biasing or suffer from poor power supply ripple rejection ratio (PSRR) at mid-range frequencies, necessitating larger load capacitors that increase the size of the LDO.
Innovation Solution
A PMOS output LDO is designed with a fast loop and a slow loop configuration, where the fast loop includes a pass transistor, a noise cancelling transistor, and a source follower transistor to improve PSRR, and the slow loop includes an error amplifier, a source follower transistor, and a feedback resistor to stabilize the output voltage, without requiring any additional voltage supply beyond the input voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional n-type output LDO is used to achieve good PSRR and faster transient response, then power supply ripple rejection ratio is improved, but an additional higher voltage supply is required
Solution Approach 1:
The LDO circuit uses its own input voltage to bias the error amplifier through the source follower transistor, eliminating the need for an external higher voltage supply. The source follower transistor generates the necessary bias voltage internally from the input voltage, making the circuit self-sufficient.
Solution Approach 2:
The patent introduces a source follower transistor stage between the error amplifier and the pass transistor gate, creating an additional voltage level dimension. This allows the error amplifier to operate at a lower voltage while still providing sufficient drive to the pass transistor, resolving the voltage supply conflict.
2Device complexity
If a conventional p-type output LDO is used to avoid additional voltage supply, then device complexity is reduced, but power supply ripple rejection ratio deteriorates at mid-range frequencies
Solution Approach 1:
The patent employs a dynamic biasing scheme where the source follower transistor adjusts its operating point based on the input voltage level and load conditions. This dynamic adjustment optimizes the PSRR performance across different operating conditions, particularly at mid-range frequencies where conventional p-type LDOs struggle.
Solution Approach 2:
The error amplifier provides feedback control to the pass transistor through the source follower stage, creating a feedback loop that actively compensates for power supply ripple. This feedback mechanism significantly improves PSRR at mid-range frequencies compared to conventional p-type LDOs without feedback optimization.
3Reliability
If a larger load capacitor is used in p-type output LDO to improve PSRR, then power supply ripple rejection ratio is improved, but the size of the LDO increases
Solution Approach 1:
The patent changes the circuit topology parameters by introducing the source follower transistor and optimizing the error amplifier biasing, which improves PSRR performance without requiring larger capacitance values. This parameter optimization allows achieving the same or better PSRR with smaller load capacitors.
Solution Approach 2:
The patent replaces the mechanical approach of using larger capacitors to improve PSRR with an electronic approach using active circuit elements (source follower transistor and error amplifier). This substitution achieves PSRR improvement through active control rather than passive energy storage, reducing the required capacitor size.
Data Source
AI summary
A PMOS-output LDO with full spectrum PSR is disclosed. In one implementation, a LDO includes a pass transistor (MO) having a source coupled to an input voltage (Vin); a noise cancelling transistor (MD) having a source coupled to the Vin, a gate coupled to a drain and a gate of the pass transistor; a source follower transistor (MSF) having a source coupled to a drain of the pass transistor, a drain coupled to the drain and gate of the noise cancelling transistor; a current sink coupled between the drain of the source follower transistor and ground; and an error amplifier having an output to drive the gate of the source follower transistor.