PMOS Level Shifter Circuit for Low-Power Shift Register Driving
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Solution Overview
Problem
The manufacturing process of shift register driving circuits and level shifters for low temperature polysilicon LCDs using complementary MOS (CMOS) transistors is complex and costly due to the need for multiple photo masks, leading to high power consumption and production costs.
Innovation Solution
A shift register driving circuit and level shifter designed using a single type of MOS transistors, specifically PMOS transistors, with a configuration including switches, energy storing devices, diodes, and transistors, which reduces power consumption and simplifies the manufacturing process by employing a level shifter with PMOS transistors M11-M18 and capacitance C, enabling efficient level shifting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If CMOS transistors are used to design shift register driving circuit and level shifter, then the circuit can achieve proper logic level control, but the manufacturing process becomes very complicated requiring larger number of photo masks
Solution Approach 1:
The patent uses a single type of MOS transistor (either all PMOS or all NMOS) to construct both the shift register driving circuit and the level shifter. This homogeneous approach eliminates the need for complementary transistor pairs required in conventional CMOS designs, thereby simplifying the manufacturing process and reducing the number of photo masks needed while maintaining proper logic level control through appropriate circuit configuration
2Reliability
If CMOS transistors are used to design shift register driving circuit and level shifter, then the circuit can achieve proper logic level control, but the cost of the whole LCD increases
Solution Approach 1:
By employing a single type of MOS transistor throughout the shift register driving circuit and level shifter design, the patent reduces manufacturing complexity and the number of fabrication steps required. This homogeneous transistor usage directly lowers manufacturing costs while maintaining the necessary logic level control functionality through carefully designed circuit topologies that do not rely on complementary transistor structures
3Reliability
If conventional CMOS design is used for shift register driving circuit, then proper signal levels can be maintained, but power consumption is higher
Solution Approach 1:
The patent employs a single type of MOS transistor in the shift register driving circuit and level shifter, which reduces the number of simultaneous switching operations required compared to conventional CMOS designs. This homogeneous approach decreases dynamic power consumption while maintaining proper signal levels through appropriate circuit configuration and level shifting mechanisms that are inherently more efficient with uniform transistor types
Data Source
AI summary
A level shifter includes a first switch, a second switch, an energy storing device, a loading device, a third switch, a diode, a forth switch, a transistor, and a fifth switch. The first switch, coupled to a first voltage, is controlled by an input signal. The second switch, coupled to the first switch, is controlled by a control signal. The energy storing device is coupled to the first and second switches. The loading device is coupled to the energy storing device. The third switch, coupled to the loading device, is controlled by a shift register anti-phase signal. The diode is coupled to the loading device and third switch. The forth switch, coupled to the diode, is controlled by the shift register anti-phase signal. The transistor is coupled to the diode for outputting an output signal. The fifth switch, coupled to the transistor, is controlled by the shift register anti-phase signal.