PMOS Power Switch Circuit for Low-Leakage High-Voltage Control
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Solution Overview
Problem
Existing power switches are bulky, require high maximum gate-to-source voltages, and suffer from current leakage, making them inefficient and larger in size due to the need for larger MOS transistors to handle high voltages.
Innovation Solution
A power switch design using PMOS transistors with a control circuit that manages voltage references and binary signals to optimize transistor states, reducing the size and current leakage by using drift PMOS transistors with lower maximum gate-to-source voltages, and implementing a control circuit that switches transistors based on input signals and voltage conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If traditional power switches use MOS transistors to handle high voltages, then the voltage handling capability is improved, but the transistor size and device area increase
Solution Approach 1:
The power switch is divided into multiple PMOS transistors (first PMOS, second PMOS, third PMOS) with different voltage handling capabilities. Each transistor is sized appropriately for its specific voltage role, avoiding the need for a single large transistor to handle the maximum voltage. The segmentation allows efficient use of transistor area while maintaining high voltage capability through proper device sizing and configuration.
2Power
If power switches are designed to handle high power potentials, then the power capability is improved, but current leakage increases
Solution Approach 1:
Different regions of the circuit have different voltage potentials (first power supply potential, second power supply potential, third power supply potential). The PMOS transistors are positioned and biased to create local potential differences that enable high power capability in certain regions while maintaining low leakage in others. The control circuit applies local quality control by selectively enabling transistors based on voltage conditions.
3Power
If the maximum gate-to-source voltage of MOS transistors is increased to handle higher power potentials, then the voltage capability is improved, but the transistor dimensions and device complexity increase
Solution Approach 1:
A control circuit acts as an intermediary between the input signals and the PMOS transistors. This control circuit manages the gating of multiple transistors with different voltage capabilities, coordinating their operation to achieve high voltage handling without requiring any single transistor to be excessively large or complex. The control circuit simplifies the overall device complexity by providing intelligent coordination.
4Object-generated harmful factors
If power switches use larger MOS transistors to reduce current leakage, then the leakage is reduced, but the device area and bulkiness increase
Solution Approach 1:
The power switch employs dynamic control of multiple PMOS transistors through a control circuit that responds to voltage conditions. Instead of using static large transistors to minimize leakage, the system dynamically enables and disables appropriate transistors based on the instantaneous voltage potentials. This dynamic operation reduces leakage current while maintaining a compact device area.
Data Source
AI summary
A power switch device includes a first terminal intended to be connected to a source of a first supply potential, a second terminal configured to supply a second potential, and a third terminal intended to be connected to a second source of a third supply potential. The device includes a first PMOS transistor having a source connected to the second terminal and a drain connected to the third terminal, a second PMOS transistor having a source connected to the second terminal, and a third PMOS transistor having a source connected to the first terminal and a drain connected to the drain of the second transistor. A control circuit generates gate control signals to control operation of the first, second and third PMOS transistors dependent on the first, second, and third supply potentials.