PMOS Power-On Reset Circuit for Stable Brownout Thresholds
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Solution Overview
Problem
Conventional Power on Reset (POR) circuits suffer from poorly controlled high and low threshold voltages due to process and temperature variations, leading to inconsistent hysteresis and brownout performance.
Innovation Solution
A POR circuit design featuring a PMOS transistor, a voltage divider, and a switch network controlled by a complementary drive circuit, where the high and low threshold voltages are set by the characteristics of the transistors and voltage divider, rather than just transistors and resistors, reducing susceptibility to process variations and eliminating threshold mismatches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a conventional POR circuit uses a resistor and transistor to set the high threshold voltage, then the circuit can be implemented with simple components, but the threshold voltage becomes poorly controlled due to process and temperature variations
Solution Approach 1:
The patent changes the controlling parameter from resistor-transistor characteristics (which are highly sensitive to process variations) to a voltage divider ratio (which can be precisely controlled). By using the voltage divider equation Vth = VDD * (R2/(R1+R2)), the threshold voltage is determined by the resistance ratio rather than absolute values, making it much less sensitive to process variations and temperature changes.
Solution Approach 2:
The patent introduces a voltage divider as an intermediary component between the power supply and the POR detection circuit. This voltage divider acts as a mediator that transforms the unstable resistor-transistor threshold into a stable, controllable voltage reference, isolating the POR function from process variations.
2Manufacturing precision
If the POR circuit uses a weak transistor with low aspect ratio to achieve the desired high threshold voltage, then the threshold can be adjusted, but the transistor becomes highly susceptible to process and temperature variations
Solution Approach 1:
The patent changes the determining factor for high threshold voltage from transistor characteristics (aspect ratio, mobility, threshold voltage) to voltage divider ratios. This parameter change eliminates the susceptibility to process and temperature variations that affect transistor characteristics, while still allowing precise adjustment of the threshold voltage through resistor selection.
Solution Approach 2:
The patent extracts the threshold voltage setting function from the transistor characteristics and places it in the voltage divider network. By separating these functions, the transistor no longer needs to be a weak transistor with specific aspect ratio, and the threshold setting becomes independent of transistor process variations.
3Adaptability or versatility
If there is threshold voltage mismatch between transistors Q1 and Q2, then the hysteresis voltage varies, but this provides flexibility in transistor design, however it degrades brownout performance
Solution Approach 1:
The patent changes the hysteresis control mechanism from transistor threshold voltage differences to voltage divider ratios. The hysteresis width is now determined by the difference between the high and low threshold voltages set by separate voltage dividers, rather than by mismatched transistor thresholds. This provides both design flexibility and consistent brownout performance.
Solution Approach 2:
The patent introduces voltage dividers as intermediaries that mediate between the power supply and the POR detection circuitry. These voltage dividers provide stable, controllable reference voltages that eliminate the need for matched transistors, thereby improving brownout performance while maintaining design flexibility.
Data Source
AI summary
A power on reset (POR) circuit is provided. For the POR circuit, a PMOS transistor is coupled to a first voltage rail at its source. A drive circuit is coupled to the drain of the PMOS transistor and is configured to output a POR signal. A voltage divider is coupled between the drain of the PMOS transistor and the second voltage rail. A switch network is provided as well, which has first and second switches. The first switch is coupled between the gate of the PMOS transistor and the voltage divider, and the second switch is coupled between the gate of the PMOS transistor and the voltage divider. A controller is also coupled to control the first and second switches, wherein the first and second switches are complementary driven.