PMOS Scan Driver Circuit for Leakage-Free NMOS Pixel Driving

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Scan drivers using NMOS transistors in display devices experience leakage currents, leading to abnormal operation due to the inherent characteristics of NMOS transistors.

Innovation Solution

Implement a scan driver using PMOS transistors, incorporating a logic circuit, output circuit, and concurrent driving circuit to control node voltages based on input signals and clock signals, enabling the generation of scan signals for NMOS pixel transistors while avoiding leakage currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If NMOS transistors are used in the scan driver, then the scan driver can generate active high scan signals for turning on NMOS transistors of the pixels, but leakage currents occur through the NMOS transistors causing abnormal operation

Engineering Contradiction:
Improvescan driver operation reliabilityVSAvoidleakage current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent inverts the transistor type used in the scan driver from NMOS to PMOS. By using PMOS transistors instead of NMOS transistors, the scan driver can drive NMOS pixel transistors without suffering from the leakage current problem that plagues NMOS-based scan drivers. This inversion of the transistor type resolves the contradiction between being able to generate active high scan signals and avoiding leakage currents.

Inventive Principle:
Principle #13The other way round (Inversion)

2Object-generated harmful factors

If PMOS transistors are used in the scan driver, then leakage currents are avoided, but additional circuit components (logic circuit, output circuit, concurrent driving circuit) are required to control node voltages

Engineering Contradiction:
Improveleakage currentVSAvoidcircuit structure
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent segments the scan driver into distinct functional circuits: a logic circuit for controlling node voltages based on clock signals, an output circuit for generating scan signals, and a concurrent driving circuit for managing voltage transitions. This segmentation allows each circuit to be optimized for its specific function while working together to achieve reliable scan signal generation without leakage currents, despite the increased overall device complexity.

Inventive Principle:
Principle #1Segmentation

3Productivity

If progressive driving period is used to sequentially provide scan signals, then pixel rows are driven in order, but the driving time is longer compared to concurrent driving

Engineering Contradiction:
Improvescan signal generation speedVSAvoiddriving period duration
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements a dynamic driving mode that can switch between progressive driving (sequential row-by-row scanning) and concurrent driving (simultaneous scanning of multiple rows). The concurrent driving circuit enables the scan driver to adapt its operation mode based on timing requirements, allowing faster concurrent scanning when needed while maintaining the reliable PMOS-based architecture that prevents leakage currents in both modes.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP4687133A1Scan driver and electronic device
Publication Date: 2026.02.04 SAMSUNG DISPLAY CO LTD
  • EP4687133A1 patent drawingFigure 1
  • EP4687133A1 patent drawingFigure 2
  • EP4687133A1 patent drawingFigure 3

AI summary

A scan driver including stages, at least one stage including a logic circuit configured to control a voltage of a first node and a voltage of a second node based on an input signal, a first clock signal, and a second clock signal in a progressive driving period, an output circuit configured to receive the first clock signal and a concurrent driving signal, and to output a scan signal in response to the voltage of the first node and the voltage of the second node, and a concurrent driving circuit configured to control the voltage of the first node and the voltage of the second node in response to an inverted concurrent driving signal in a concurrent driving period such that the output circuit is configured to output the concurrent driving signal as the scan signal in the concurrent driving period.