PMOS Gate Driver Stage Circuit with Compact Bootstrapping Control

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Solution Overview

Problem

Display devices face significant dead space issues due to the large size of stage circuits in gate drivers, primarily composed of PMOS transistors, which necessitate bootstrapping operations to reduce internal node voltages.

Innovation Solution

A stage circuit design incorporating a first transistor, a second transistor, a third transistor, a first capacitor, and a control circuit, utilizing PMOS transistors with 180-degree phase-shifted clock signals to reduce circuit size and improve waveform performance, while minimizing transistor and capacitor usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If each stage circuit includes only PMOS transistors, then the circuit can be simplified in structure, but the circuit size increases significantly

Engineering Contradiction:
Improvecircuit structureVSAvoidcircuit size
Core Design Contradiction:
Device complexityVSArea of moving object

Solution Approach 1:

The patent combines multiple PMOS transistors into a compact arrangement where transistors share common connections and control nodes. The stage circuit integrates the input transistor, output transistor, and control transistors in a merged configuration that reduces overall area while maintaining the single-PMOS-type architecture.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs multi-layered circuit routing and three-dimensional transistor stacking techniques to arrange PMOS transistors in a compact footprint. By utilizing vertical stacking and layered interconnect structures, the circuit achieves high integration density without increasing the planar area significantly.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If bootstrapping operation is performed to reduce internal node voltages, then the output signal can achieve low voltage level, but the circuit size increases

Engineering Contradiction:
Improveoutput signal voltage levelVSAvoidcircuit size
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent extracts the bootstrapping function into a dedicated control circuit that operates independently from the main signal path. By separating the voltage control function into a specialized subsystem with dedicated control transistors and capacitors, the main stage circuit remains compact while still achieving the required low voltage output levels through the extracted bootstrapping mechanism.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces control capacitors and intermediate control nodes as mediators between the power supply and the internal circuit nodes. These intermediary elements enable voltage level transformation and bootstrapping action without requiring large-area direct coupling, allowing compact implementation of the voltage reduction function.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250279037A1Stage circuit of gate driver and display device including the same
Publication Date: 2025.09.04 SAMSUNG DISPLAY CO LTD
  • US20250279037A1 patent drawing
  • US20250279037A1 patent drawing
  • US20250279037A1 patent drawing

AI summary

A stage circuit included in a gate driver of a display device, includes: a first transistor connected between an input terminal receiving an input signal and a control terminal, and including a gate electrode connected to a first clock terminal receiving a first clock signal: a second transistor connected between a line supplying a gate high voltage and an output terminal generating an output signal, and including a gate electrode connected to an inversion control terminal; a third transistor connected between the output terminal and a second clock terminal receiving a second clock signal, and including a gate electrode connected to the control terminal; a first capacitor connected between the control terminal and the output terminal; and a control circuit configured to controlling an inversion control voltage of the inversion control terminal based on a control voltage of the control terminal.