PMOS Threshold Voltage Control via Germanium Implantation

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Solution Overview

Problem

The manufacturing of PMOS transistors faces significant challenges due to variations in the thickness of semiconductor materials, leading to inconsistent threshold voltage and reduced controllability, which affects the performance and operation of integrated circuits.

Innovation Solution

A process flow involving ion implantation of germanium into the P-active region of a silicon-containing substrate to form an implanted silicon-germanium region, which helps in controlling the threshold voltage of PMOS devices, reducing variations and enhancing controllability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If semiconductor material thickness is reduced to improve transistor scaling, then operating speed increases, but threshold voltage control becomes inconsistent and leakage current increases

Engineering Contradiction:
Improveoperating speedVSAvoidthreshold voltage control
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent applies local quality by selectively modifying the channel region properties through targeted germanium implantation. The channel region receives a different dopant concentration and material composition compared to other regions, creating localized properties that enable consistent threshold voltage control even as overall device dimensions are scaled down. This local modification allows the channel to maintain proper electrical characteristics without requiring uniform thickness reduction across the entire device structure.

Inventive Principle:
Principle #3Local quality

2Speed

If channel length is scaled down to improve switching speed, then operating speed increases, but short channel behavior increases and threshold voltage becomes more sensitive to variations

Engineering Contradiction:
Improveswitching speedVSAvoidthreshold voltage stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent employs parameter changes by modifying the dopant concentration and material composition in the channel region through germanium implantation. By changing these physical parameters locally in the channel, the invention compensates for the adverse effects of short channel scaling, maintaining stable threshold voltage and reducing short channel behavior while preserving the benefits of reduced channel length for switching speed.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If germanium implantation is used to control threshold voltage, then threshold voltage uniformity improves, but process complexity increases

Engineering Contradiction:
Improvethreshold voltage uniformityVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent uses germanium implantation as an intermediary process to achieve threshold voltage control. Rather than directly adjusting threshold voltage through complex multi-step processes, the germanium implantation serves as a mediating step that modifies channel properties in a controlled manner, enabling uniform threshold voltage across devices while adding only a single process step to the manufacturing flow.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method achieves more uniform and controllable threshold voltage across PMOS transistors, improving their performance and operation by accurately controlling the germanium implantation, thereby reducing the impact of thickness variations.

Implementation Method 1

performing an ion implantation process to implant germanium into the P-active region to form an implanted silicon-germanium region in the P-active region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS8828816B2PMOS threshold voltage control by germanium implantation
Publication Date: 2014.09.09 GLOBALFOUNDRIES US INC
  • US8828816B2 patent drawing
  • US8828816B2 patent drawing
  • US8828816B2 patent drawing

AI summary

Disclosed herein is a method of forming a semiconductor device. In one example, the method comprises forming a P-active region in a silicon containing semiconducting substrate, performing an ion implantation process to implant germanium into the P-active region to form an implanted silicon-germanium region in the P-active region, and forming a gate electrode structure for a PMOS transistor above the implanted silicon-germanium region.