Microprocessor PMU with External EEPROM for Customizable Power Control
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Solution Overview
Problem
Conventional power management units (PMUs) for complex electronic systems require large RAM to implement modifications and adaptations, which is costly and limits flexibility, especially when dealing with proprietary commands and sensitive data.
Innovation Solution
A microprocessor-based PMU with a dedicated logic block and external re-writable non-volatile memory (NVM) allows for customized extensions and modifications without loading the entire program into RAM, using encryption and error correcting codes to protect sensitive information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional PMU uses large RAM to implement modifications and adaptations, then flexibility and adaptability are improved, but cost and device complexity increase
Solution Approach 1:
The patent segments the PMU functionality into a fixed core component (implemented in hardwired logic) and a configurable extension component (stored in EEPROM). The core PMU handles standard power management functions, while the EEPROM stores additional proprietary commands and adaptations. This segmentation allows flexibility through customization without requiring large RAM resources, as only the necessary extension code is stored externally.
Solution Approach 2:
The patent moves the adaptable portion of the PMU from the traditional in-RAM implementation to an external dimension by using EEPROM memory. This dimensional shift allows the system to maintain flexibility and adaptability by storing extension commands externally, avoiding the need for large RAM while enabling customization through external code loading and execution.
2Adaptability or versatility
If conventional PMU uses large RAM to implement modifications and adaptations, then adaptability is improved, but cost increases
Solution Approach 1:
The patent segments the PMU functionality into a fixed core component (implemented in hardwired logic) and a configurable extension component (stored in EEPROM). The core PMU handles standard power management functions, while the EEPROM stores additional proprietary commands and adaptations. This segmentation allows flexibility through customization without requiring large RAM resources, as only the necessary extension code is stored externally.
Solution Approach 2:
The patent replaces expensive, large-capacity RAM with a more cost-effective solution using EEPROM for storing extension commands. EEPROM is a cheaper, non-volatile memory technology that can store the necessary adaptation code without requiring the large, expensive RAM capacity that would otherwise be needed to maintain flexibility and adaptability in the PMU system.
3Adaptability or versatility
If proprietary commands are implemented in conventional PMU, then system customization is improved, but security and protection of sensitive information deteriorate
Solution Approach 1:
The patent implements a security verification mechanism that performs preliminary actions before executing proprietary commands. The microprocessor reads the proprietary command from EEPROM, verifies its authenticity and security attributes, and only then executes the command if it passes verification. This preliminary security check protects sensitive information while allowing system customization through proprietary commands.
Solution Approach 2:
The patent introduces an intermediary security verification layer between the EEPROM storage and the command execution. This intermediary mechanism validates proprietary commands before they are executed, acting as a mediator that ensures security requirements are met while still allowing customized proprietary functionality to operate. The intermediary prevents unauthorized or malicious code execution while permitting legitimate system customization.
Data Source
AI summary
A control unit for power supply circuits of points of load (POL) of an electronic system includes a means for autonomous customization by the customer-user of the original control program residing in the ROM of the device, as well as configuration of control parameters of the POL. Microprocessor architecture of the device includes a dedicated logic block and a rewritable non-volatile memory coupled to the data bus of the device or to an auxiliary bus thereof, thus providing a means for software extension of the power supply circuits. RAM is loaded at start-up with data of modified or added routines for implementing new commands and values of configuration and control data of the POL. The RAM may optionally be subjected to encryption/decryption for protection. During operation, program execution jumps from ROM address space to RAM address space and vice versa when certain values of a program counter are reached.