pMUT Array Integration via Low-Temperature Eutectic Bonding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for integrating piezoelectric micromachined ultrasonic transducer (pMUT) arrays with application-specific integrated circuits (ASICs) face challenges such as high temperature requirements, instability, and complexity in bonding processes.
Innovation Solution
The use of thermocompression bonding, eutectic bonding, or solder bonding to integrate pMUT arrays with ASICs, allowing for heterogeneous integration, low-temperature processing, and high-density interconnects, while maintaining the piezoelectric properties of the pMUTs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If traditional bonding methods are used to integrate pMUT arrays with ASICs, then bonding strength may be achieved, but high temperature requirements and process complexity increase
Solution Approach 1:
The patent changes the bonding parameters by using low-temperature eutectic bonding (around 100-200°C) instead of traditional high-temperature bonding methods. This involves selecting specific material combinations (such as Au-Si, Al-Ge) that exhibit eutectic behavior at low temperatures, thereby achieving strong bonds without exposing the piezoelectric materials to high temperatures that would degrade their properties.
Solution Approach 2:
The patent employs composite material systems consisting of specific metal pairs (e.g., Au-Si, Al-Ge, Au-Ge) that form eutectic alloys. These composite material combinations enable bonding at low temperatures while maintaining bond strength, as the eutectic reaction creates a metallurgical bond between the dissimilar materials at temperatures below the melting point of either individual material.
2Device complexity
If direct coupling of pMUT arrays to ASICs is implemented, then system size and cost are reduced, but bonding reliability becomes more critical
Solution Approach 1:
The patent changes the bonding temperature parameter to low temperatures (100-200°C), which prevents thermal degradation of both the piezoelectric pMUT materials and the semiconductor ASIC. This low-temperature eutectic bonding process ensures that neither material undergoes property degradation, thereby maintaining high bonding reliability while enabling direct coupling that reduces system size.
Solution Approach 2:
The patent uses thin-film metallization layers (typically micrometers thick) as the bonding interfaces. These thin-film layers are specifically designed to be the bonding sacrificial elements that form the eutectic joint, while preserving the integrity of the bulk piezoelectric and semiconductor materials. The thin-film nature allows for low-temperature processing and reliable bonding without compromising the main functional materials.
3Adaptability or versatility
If heterogeneous integration of different materials is performed, then integration flexibility increases, but process stability becomes more challenging
Solution Approach 1:
The patent uses eutectic material pairs (such as Au-Si, Al-Ge, Au-Ge) that have well-defined, reproducible bonding characteristics. These composite material systems provide process stability because the eutectic reaction occurs at a specific temperature and composition, creating a predictable and repeatable bonding process despite the heterogeneity of the materials being joined. The phase diagram of eutectic systems provides a stable foundation for consistent bonding results.
Solution Approach 2:
The patent maintains process stability by precisely controlling the bonding temperature parameter to match the eutectic temperature of the selected material pair. This parameter control ensures that the bonding process is reproducible and stable, even when integrating heterogeneous materials with different properties. The low temperature regime also prevents thermal stress and material degradation, further enhancing process stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient and reliable integration of pMUT arrays with ASICs, reducing system size, cost, and noise, while preserving the reliability and performance of the pMUTs.
Implementation Method 1
the first substrate and the second substrate are bonded together using thermocompression
Implementation Method 2
the thermocompression bonding forms a hermetic sealed cavity, which cavity is configured to controllably maintain gas species and pressure
Implementation Method 3
The use of thermocompression bonding, eutectic bonding, or solder bonding may offer several advantages for integration
Implementation Method 4
The use of thermocompression bonding, eutectic bonding, or solder bonding may offer several advantages for integration
Implementation Method 5
Piezoelectric micromachined ultrasonic transducer (pMUT) arrays may offer advantages in ultrasonic imaging due to their efficiency in transducing between the electrical and acoustic energy domains
Implementation Method 6
Piezoelectric micromachined ultrasonic transducer (pMUT) arrays may offer advantages in ultrasonic imaging due to their efficiency in transducing between the electrical and acoustic energy domains
Data Source
AI summary
The present disclosure provides methods to integrate piezoelectric micromachined ultrasonic transducer (pMUT) arrays with an application-specific integrated circuit (ASIC) using thermocompression or eutectic/solder bonding. In an aspect, the present disclosure provides a device comprising a first substrate and a second substrate, the first substrate comprising a pMUT array and the second substrate comprising an electrical circuit, wherein the first substrate and the second substrate are bonded together using thermocompression, wherein any set of individual PMUTs of PMUT array is addressable. In another aspect, the present disclosure provides a device comprising a first substrate and a second substrate, the first substrate comprising a pMUT array and the second substrate comprising an electrical circuit, wherein the first substrate and the second substrate are bonded together using eutectic or solder bonding, wherein any set of individual PMUTs of the PMUT array is addressable.


