Anti-Serial PN Junction Structure for Third Harmonic Suppression
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor devices, such as ESD protection devices and TVS devices, generate spurious odd harmonics, particularly third harmonics, which interfere with other frequency bands, and existing approaches to minimize odd harmonics are insufficient, especially in reducing breakdown voltage while maintaining low harmonic generation.
Innovation Solution
The semiconductor device incorporates pairs of anti-serially connected pn-junction structures with adjusted junction grading coefficients, specifically within a tolerance range defined by an ellipse equation, to minimize the generation of spurious odd harmonics, including the third harmonic, and achieve a desired breakdown voltage by optimizing the junction grading coefficients and capacitance characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If conventional pn-junction structures with standard junction grading coefficients are used, then the device provides basic ESD protection and TVS functionality, but spurious odd harmonics (particularly third harmonics) are generated at high power levels that interfere with other frequency bands
Solution Approach 1:
The patent applies parameter changes by adjusting the junction grading coefficients (m1, m2) of the pn-junction structures to specific values within defined ranges (m1: 0.35-0.65, m2: 0.25-0.45) to minimize the generation of spurious odd harmonics. This optimization of electrical parameters directly reduces the harmful third harmonic signals while maintaining effective ESD protection and TVS functionality.
Solution Approach 2:
The patent employs a composite structure consisting of multiple pn-junction structures (first and second pn-junction structures) with different junction grading coefficients connected in series. This composite configuration allows the device to achieve both low third harmonic generation and desired breakdown voltage characteristics by combining the complementary behaviors of junctions with different grading coefficients.
2Object-generated harmful factors
If the junction grading coefficients are adjusted to minimize third harmonic generation, then spurious odd harmonics are reduced by at least 10 dB, but the breakdown voltage becomes difficult to control within desired ranges for TVS applications
Solution Approach 1:
The patent uses a composite structure of multiple pn-junctions with different grading coefficients to simultaneously achieve low third harmonic generation and controlled breakdown voltage. The series connection of junctions with complementary characteristics allows independent optimization of harmonic suppression and voltage breakdown properties.
Solution Approach 2:
Different regions of the device (different pn-junction structures) are assigned different junction grading coefficients tailored to their specific functions: one junction is optimized for minimizing third harmonic generation while another is optimized for providing the desired breakdown voltage characteristic, allowing each local region to perform its specialized function effectively.
3Device complexity
If a single pn-junction structure is used, then the device structure is simple, but it cannot simultaneously achieve both low third harmonic generation and desired breakdown voltage characteristics
Solution Approach 1:
The patent implements a composite structure of multiple pn-junction structures with different junction grading coefficients connected in series. This composite configuration enables the device to simultaneously achieve low third harmonic generation and controlled breakdown voltage, overcoming the limitations of single-junction structures while maintaining practical device complexity.
Solution Approach 2:
The device is segmented into multiple functional pn-junction structures, each with specifically optimized junction grading coefficients. This segmentation allows the device to distribute different functions (harmonic suppression, voltage breakdown control) across separate junctions, achieving superior overall performance compared to a single undivided structure.
Data Source
AI summary
A semiconductor device includes “n” pairs of pn-junction structures, wherein the i-th pair includes two pn-junction structures of the i-th type, wherein the two pn-junction structures of the i-th type are anti-serially connected, wherein the pn-junction structure of the i-th type has an i-th junction grading coefficient mi. A first pair of the n pairs of pn-junction structures has a first junction grading coefficient m1 and a second pair of the n pairs of pn-junction structures has a second junction grading coefficient m2. The junction grading coefficients m1, m2 are adjusted to result in generation of a spurious third harmonic signal of the semiconductor device with a signal power level, which is at least 10 dB lower than a reference signal power level of the spurious third harmonic signal obtained for a reference case in which the first and second junction grading coefficients m1, m2 are 0.25.