PN-Junction Protection Structure for MOS Power Devices
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Solution Overview
Problem
Existing power semiconductor devices face challenges in detecting and responding to short circuit events quickly enough, leading to increased power losses and complexity due to reliance on external load current and voltage measurements, which are often too slow and increase overall device complexity.
Innovation Solution
A temperature-responsive protection structure integrated within the same chip as the power semiconductor device, thermally coupled to the load current path, with a series connection of pn-junctions having negative temperature coefficients, connected in forward bias between the control and load terminals to limit control voltage during short circuit events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external load current and voltage measurement is used to detect short circuit events, then the device can identify short circuit conditions, but the response speed is too slow and device complexity increases
Solution Approach 1:
The patent introduces an intermediate thermal coupling mechanism that transfers temperature information from the load current path to the protection structure. This thermal intermediary enables the protection structure to sense short circuit conditions indirectly through temperature changes, achieving fast response without requiring external electrical measurements
Solution Approach 2:
The protection structure utilizes the inherent thermal field generated during short circuit events to trigger the protection mechanism. The series connection of pn-junctions automatically responds to temperature increases by modifying their forward voltage characteristics, enabling self-protection without external control circuits
2Reliability
If external load current and voltage measurement is used to detect short circuit events, then the device can identify short circuit conditions, but the overall device complexity increases
Solution Approach 1:
The patent merges the protection structure with the existing chip substrate, integrating the series connection of pn-junctions directly into the device architecture. This consolidation eliminates the need for separate external sensing circuits and control logic, reducing overall device complexity while maintaining protection functionality
Solution Approach 2:
The protection structure serves multiple functions: it acts as a temperature sensor, a voltage limiter, and a protection trigger simultaneously. The series connection of pn-junctions provides both the sensing mechanism and the active protection response, reducing the need for additional dedicated components
3Loss of energy
If cell density and transconductance are increased to reduce conduction loss, then power losses are reduced, but current density in short circuit mode increases and allowable short circuit duration decreases
Solution Approach 1:
The protection structure is designed to preemptively limit control voltage before thermal damage can occur during short circuit events. By detecting temperature increases early through the thermal coupling mechanism and immediately responding by reducing gate voltage, the system prevents the escalation of harmful effects that would otherwise occur with high cell density devices
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The protection structure effectively limits control voltage and reduces power losses by rapidly responding to short circuit events through thermal coupling, enhancing the device's ability to manage high current densities and extending its operational availability.
Implementation Method 1
The protection structure is temperature responsive and thermally coupled to the load current path
Implementation Method 2
The resistance of the protection structure has a negative temperature coefficient and is connected in series (e.g., forward bias) between the control terminal and the load terminal of the device
Data Source
AI summary
A single chip power semiconductor device includes: first and second load terminals; a semiconductor body integrated in the single chip and coupled to the load terminals and configured to conduct a load current along a load current path between the load terminals; a control terminal and at least one control electrode electrically connected thereto, the at least one control electrode being electrically insulated from the semiconductor body and configured to control the load current based on a control voltage between the control terminal and the first load terminal; a protection structure integrated, separately from the load current path, in the single chip and including a series connection of pn junctions with first semiconductor regions of a first conductivity type and second semiconductor regions of a second conductivity type. The series connection of the pn-junctions is connected in forward bias between the control terminal and the first load terminal.