Three-Layer PN Junction Optical Modulator for Lower-Voltage Phase Modulation

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Solution Overview

Problem

Conventional Si optical modulators face limitations in power consumption, speed, and modulation efficiency due to constraints in ion implantation patterns, particularly in vertical and interleaved pn junction structures.

Innovation Solution

The optical modulator incorporates a semiconductor layer with a pn junction configuration comprising three layers: a low-concentration p-type and n-type semiconductor layers, and medium-concentration p-type or n-type semiconductor layers, allowing for a wider range of ion implantation options to enhance modulation efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional vertical or interleaved pn junction structures are used, then the device complexity is reduced, but the modulation efficiency and speed are limited

Engineering Contradiction:
Improvemodulation speedVSAvoidpn junction structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The pn junction structure is segmented into multiple distinct layers with different doping concentrations (low-concentration p-type, medium-concentration p-type, low-concentration n-type). This segmentation allows each layer to perform specific functions: the low-concentration layers provide carrier depletion for modulation while the medium-concentration layers provide structural support and reduce leakage, thereby achieving high-speed modulation without excessive complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the semiconductor layer are assigned different doping concentrations tailored to their specific functions. The low-concentration p-type and n-type layers are positioned where carrier depletion is needed for modulation, while the medium-concentration p-type or n-type layers are positioned to provide structural stability and reduce leakage current, optimizing both speed and efficiency locally

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If ion implantation patterns are constrained to vertical or interleaved pn junctions, then the manufacturing process is simplified, but the modulation efficiency is reduced

Engineering Contradiction:
Improveion implantation process simplicityVSAvoidmodulation efficiency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The ion implantation process is made dynamic and flexible by allowing medium-concentration p-type or n-type semiconductor layers to be added at various positions within the waveguide structure. This dynamic approach enables optimization of the ion implantation pattern to achieve higher modulation efficiency while maintaining manufacturability through standard ion implantation techniques

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The doping concentration parameter is changed by introducing medium-concentration layers in addition to the low-concentration layers. This parameter change allows the structure to achieve better carrier depletion characteristics and reduced leakage while still using conventional ion implantation processes, thereby improving modulation efficiency without significantly complicating manufacturing

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If higher modulation efficiency is achieved through optimized pn junction structures, then power consumption is reduced, but the device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidsemiconductor layer structure complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The multiple semiconductor layers with different doping concentrations are merged into a single integrated structure that functions as a unified modulation element. This merging approach achieves high modulation efficiency and low power consumption while avoiding the need for separate discrete components, thereby controlling overall device complexity

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables high modulation efficiency with reduced power consumption and increased speed, achieving optical modulation at lower voltages and improving the performance of optical communication systems.

Implementation Method 1

when the material is Si, the carrier plasma effect is mainly used

Methodology Applied
Scientific EffectCarrier plasma effect:

Implementation Method 2

phases of the two pieces of split light are changed by phase modulation portions provided in the two split optical waveguides

Methodology Applied
Scientific EffectPhase modulation: Phase Modulation

Data Source

PatentUS20250377561A1Optical Modulator
Publication Date: 2025.12.11 NT T INC
  • US20250377561A1 patent drawing
  • US20250377561A1 patent drawing
  • US20250377561A1 patent drawing

AI summary

With a structure in which an ion implantation pattern can be controlled with a wider range of options, optical modulation efficiency is enhanced. An optical modulator including a semiconductor layer with a pn junction in an optical waveguide core. The optical modulator includes: a low-concentration p-type semiconductor layer and a low-concentration n-type semiconductor layer that form the pn junction; and a medium-concentration p-type semiconductor layer that is added to the low-concentration p-type semiconductor layer or a medium-concentration n-type semiconductor layer that is added to the low-concentration n-type semiconductor layer. The optical waveguide core configured with three layers of the low-concentration p-type semiconductor layer, the medium-concentration p-type semiconductor layer, and the low-concentration n-type semiconductor layer, or configured with three layers of the low-concentration p-type semiconductor layer, the medium-concentration n-type semiconductor layer, and the low-concentration n-type semiconductor layer.