PN Sequence Detector Circuit With Selective Symbol Correlation
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Solution Overview
Problem
Current detector circuits in communication technology face complexity and accuracy issues during synchronization procedures due to inter-symbol interference (ISI), especially when adjacent symbols of the Pseudo-Noise Sequence have different signs, leading to decreased system accuracy.
Innovation Solution
A detector circuit comprising a sign detector circuit, a calculator circuit, and a comparator circuit that selects symbols with the same signs as adjacent symbols for calculation, generating calculation values and comparison results to determine correct reception of the Pseudo-Noise Sequence, thereby reducing circuit and calculation complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If all symbols of the Pseudo-Noise Sequence are calculated for detection, then detection accuracy is improved, but circuit complexity and calculation complexity increase
Solution Approach 1:
The patent extracts and processes only specific symbols from the Pseudo-Noise Sequence based on their sign characteristics. The sign detector identifies symbols with the same sign as adjacent symbols, and the calculator circuit processes only these selected symbols rather than all symbols, thereby reducing circuit complexity while maintaining detection accuracy through selective processing
Solution Approach 2:
Instead of processing all symbols equally, the patent applies partial action by selectively processing only those symbols that meet the sign criterion. This partial processing approach reduces the calculation burden and circuit complexity while still achieving reliable detection by focusing on the most informative symbols
2Measurement precision
If all symbols of the Pseudo-Noise Sequence are calculated for detection, then detection accuracy is improved, but calculation complexity increases
Solution Approach 1:
The patent extracts and processes only specific symbols from the Pseudo-Noise Sequence based on their sign characteristics. The sign detector identifies symbols with the same sign as adjacent symbols, and the calculator circuit processes only these selected symbols rather than all symbols, thereby reducing circuit complexity while maintaining detection accuracy through selective processing
Solution Approach 2:
Instead of processing all symbols equally, the patent applies partial action by selectively processing only those symbols that meet the sign criterion. This partial processing approach reduces the calculation burden and circuit complexity while still achieving reliable detection by focusing on the most informative symbols
Data Source
AI summary
A detector circuit incudes a calculator circuit and a comparator circuit. The calculator circuit is configured to generate a plurality of first calculation values according to a plurality of first calculation symbols of a Pseudo-Noise Sequence and a plurality of second calculation symbols of a received signal, and generate a second calculation value according to the first calculation values. If a sign of a symbol of the Pseudo-Noise Sequence is the same to a sign of an adjacent symbol, the symbol is one of the first calculation symbols, and the second calculation symbols are corresponding to the first calculation symbols respectively. The comparator circuit is configured to generate a comparison result according to the second calculation value and a threshold value. The comparison result is configured for determining whether the detector circuit correctly receives the Pseudo-Noise Sequence.