pNIC Flow Processing Offload via VPID to PPID Mapping

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Solution Overview

Problem

Existing programmable network interface controllers (NICs) face inefficiencies in flow processing due to the lack of optimized mappings between virtual and physical port identifiers, leading to suboptimal performance in virtualized compute environments.

Innovation Solution

A method is introduced to configure physical network controllers (pNICs) with mappings between virtual port identifiers (VPIDs) and physical port identifiers (PPIDs), allowing for dynamic updates and storage of flow entries in network processing hardware to enable efficient flow processing offload, even during compute node migrations and changes in network configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If flow processing is offloaded to programmable NICs in virtualized environments, then processing efficiency is improved, but complexity in mapping virtual port identifiers to physical port identifiers increases

Engineering Contradiction:
Improveflow processing efficiencyVSAvoidmapping complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces mapping tables as intermediary data structures that bridge virtual port identifiers (VPIDs) and physical port identifiers (PPIDs). These mapping tables act as mediators between the virtualized compute nodes and the physical network interfaces, enabling the programmable NIC to resolve virtual identifiers to physical interfaces without requiring complex real-time computation or coordination overhead.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The mapping between VPIDs and PPIDs is established in advance through configuration processes before flow processing begins. The mapping tables are pre-populated with the correct associations between virtual and physical port identifiers, allowing the NIC to perform fast lookups during flow processing without needing to compute or negotiate mappings dynamically.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If dynamic updates to flow entries are implemented during compute node migrations, then adaptability is improved, but processing time and system overhead increase

Engineering Contradiction:
Improvecompute node migration supportVSAvoidflow entry update time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system implements feedback mechanisms where the virtual switch or management controller monitors compute node migration events and automatically triggers updates to the mapping tables and flow entries. When a compute node migrates to a different physical interface, the system receives feedback about the migration event and responds by updating the relevant VPID to PPID mappings and notifying the programmable NIC to update its flow processing rules.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The mapping tables and flow entry configurations are designed to be dynamic rather than static, allowing them to be updated in response to changing network conditions and compute node locations. The system can modify the VPID to PPID mappings and flow entries on-the-fly without requiring a complete reconfiguration of the flow processing pipeline, enabling seamless adaptability during migrations.

Inventive Principle:
Principle #15Dynamics

3Speed

If flow entries are stored in network processing hardware for fast lookup, then processing speed is improved, but memory capacity and hardware complexity increase

Engineering Contradiction:
Improveflow lookup speedVSAvoidhardware memory capacity
Core Design Contradiction:
SpeedVSVolume of stationary object

Solution Approach 1:

The patent segments the flow processing data structures into multiple components: mapping tables that store VPID to PPID associations, and flow entry tables that store matching criteria and actions. These segmented data structures can be organized in hierarchical or distributed manner across different memory hierarchies (e.g., on-chip cache, off-chip memory), allowing fast access to frequently used mappings while storing less frequently accessed flow entries in larger capacity memory.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250106172A1Configuring pnic to perform flow processing offload using virtual port identifiers
Publication Date: 2025.03.27 VMWARE INC
  • US20250106172A1 patent drawing
  • US20250106172A1 patent drawing
  • US20250106172A1 patent drawing

AI summary

Some embodiments of the invention provide a method for configuring a physical network card or physical network controller (pNIC) to provide flow processing offload (FPO) for a host computer connected to the pNIC. The host computers host a set of compute nodes in a virtual network. The set of compute nodes are each associated with a set of interfaces that are each assigned a locally-unique virtual port identifier (VPID) by a flow processing and action generator. The pNIC includes a set of interfaces that are assigned physical port identifiers (PPIDs) by the pNIC. The method includes providing the pNIC with a set of mappings between VPIDs and PPIDs. The method also includes sending updates to the mappings as compute nodes migrate, connect to different interfaces of the pNIC, are assigned different VPIDs, etc.