PNPN Blocking Vertical Cavity Light Source

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Solution Overview

Problem

Vertical-cavity surface-emitting devices face limitations due to internal strain, heat flow, and manufacturing non-uniformity in oxide apertures, as well as increased resistance and poor optical mode behavior in existing current confinement techniques such as tunnel junctions and proton implanted regions.

Innovation Solution

The implementation of impurity regions in the cavity spacer to control electrical conductivity, forming a PNPN blocking region with epitaxial confinement structures, including distributed Bragg reflector mirror layers and heterostructure cavity spacers, to achieve low electrical resistance and efficient current blocking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If oxide aperture is used for current and mode confinement, then high efficiency is achieved, but internal strain and manufacturing non-uniformity increase

Engineering Contradiction:
ImproveefficiencyVSAvoidinternal strain and manufacturing non-uniformity
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent changes the material parameter from oxide aperture to epitaxial heterostructure with graded composition (AlGaAs layers with varying Al content). This parameter change maintains the confinement function while eliminating the strain and non-uniformity issues associated with oxide formation, as the epitaxial growth allows precise control of composition and thickness.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite heterostructure consisting of multiple AlGaAs layers with different aluminum compositions (e.g., Al0.3Ga0.7As, Al0.5Ga0.5As, Al0.7Ga0.3As) combined with GaAs layers. This composite structure provides both optical mode confinement through refractive index differences and electrical current confinement through doping profiles, replacing the single-material oxide aperture approach.

Inventive Principle:
Principle #40Composite materials

2Object-generated harmful factors

If tunnel junction or proton implanted regions are used for current confinement, then current blocking is achieved, but electrical resistance increases

Engineering Contradiction:
Improvecurrent blockingVSAvoidelectrical resistance
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The patent applies local quality by creating spatially varying doping profiles within the heterostructure. The current blocking regions have specific doping concentrations (e.g., Si-doped n-type layers) localized at particular positions, while the active region and contact regions have different doping characteristics. This local differentiation achieves current blocking without introducing high resistance, as the blocking function is confined to specific zones rather than requiring high-resistance materials throughout.

Inventive Principle:
Principle #3Local quality

3Object-generated harmful factors

If oxide aperture is used, then mode confinement is achieved, but thermal expansion mismatch and heat flow problems occur

Engineering Contradiction:
Improvemode confinementVSAvoidthermal expansion mismatch and heat flow
Core Design Contradiction:
Object-generated harmful factorsVSTemperature

Solution Approach 1:

The patent achieves homogeneity by using a fully epitaxial AlGaAs/GaAs heterostructure where all layers are grown on the same GaAs substrate. This ensures matched thermal expansion coefficients throughout the structure, eliminating the thermal stress and heat flow problems that arise from bonding dissimilar materials like oxide apertures to semiconductor substrates. The homogeneous material system allows efficient heat conduction to the substrate without thermal mismatch barriers.

Inventive Principle:
Principle #33Homogeneity

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables low electrical resistance and high efficiency in vertical cavity light sources by controlling current flow and maintaining high material quality, reducing optical scattering loss and increasing reliability.

Implementation Method 1

mirrors based on distributed Bragg reflectors (DBRs)

Methodology Applied
Scientific EffectBragg reflection: Bragg Diffraction

Implementation Method 2

impurity regions placed in its cavity spacer to control the electrical conductivity

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS11088509B2Low resistance vertical cavity light source with PNPN blocking
Publication Date: 2021.08.10 UNIVERSITY OF CENTRAL FLORIDA RESEARCH FOUNDATION INC
  • US11088509B2 patent drawing
  • US11088509B2 patent drawing
  • US11088509B2 patent drawing

AI summary

A semiconductor vertical light source includes upper and lower mirrors with an active region in between, an inner mode confinement region, and an outer current blocking region that includes a common epitaxial layer including an epitaxially regrown interface between the active region and upper mirror. A conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer. The first and second impurity doped region force current flow into the conducting channel during normal operation of the light source.