PoE PSE Controller Architecture for Low Standby Power

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Solution Overview

Problem

Power over Ethernet (PoE) systems face challenges in meeting low standby power requirements due to inefficiencies in existing circuit architectures, particularly in supporting next-generation applications that demand higher power while adhering to energy efficiency regulations such as DOE level VI and COC tier II standards.

Innovation Solution

A novel circuit architecture for Power Source Equipment (PSE) controllers that includes a micro-controller, detection and classification circuitry, and power control and monitor circuitry, which can be individually turned off to minimize standby power, and can be put into deep sleep when no powered device is detected, ensuring compliance with low standby power regulations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If existing PoE circuit architecture is used to support higher power demands, then power delivery capability is improved, but standby power consumption increases

Engineering Contradiction:
Improvepower delivery capabilityVSAvoidstandby power consumption
Core Design Contradiction:
PowerVSUse of energy by stationary object

Solution Approach 1:

The PoE controller is divided into separate functional modules: detection and classification circuitry, power control and monitor circuitry, and a microcontroller. These modules can be independently powered down or placed in low-power states, allowing the system to maintain high power delivery capability when needed while minimizing standby consumption by selectively activating only necessary functions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit architecture implements dynamic power management where different circuit blocks are enabled or disabled based on operational state. The microcontroller can selectively activate detection/classification or power control/monitoring functions, and transition between active and deep sleep modes, allowing the system to adapt power consumption to actual operational requirements rather than maintaining constant high-power readiness.

Inventive Principle:
Principle #15Dynamics

2Reliability

If detection and classification circuitry remains active continuously, then PD detection reliability is improved, but energy consumption increases

Engineering Contradiction:
ImprovePD detection reliabilityVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The detection and classification circuitry operates periodically rather than continuously. The microcontroller activates these circuits at scheduled intervals to detect and classify connected PDs, then enters a low-power state between detections. This periodic operation maintains reliable PD detection capability while significantly reducing average energy consumption compared to continuous monitoring.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system uses event-triggered detection where the microcontroller monitors for PD connection events and activates detection/classification circuitry only when a PD is detected or suspected to be connected. This self-service approach ensures reliable detection when needed while avoiding unnecessary energy consumption during idle periods without PDs.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If power control and monitor circuitry is continuously active, then power monitoring accuracy is improved, but standby power increases

Engineering Contradiction:
Improvepower monitoring accuracyVSAvoidstandby power
Core Design Contradiction:
Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

The power control and monitor circuitry is separated as an independent functional block that can be selectively activated. The microcontroller enables this circuitry only during periods when power monitoring is required (such as when a PD is detected or during scheduled monitoring intervals), and disables it during standby periods, thereby maintaining measurement accuracy when needed while minimizing standby power consumption.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP3582436B1Active/IEEE standards based power over ethernet low standby power circuit architecture
Publication Date: 2021.02.17 PHIHONG TECH CO LTD
  • EP3582436B1 patent drawingFigure 1A~1B
  • EP3582436B1 patent drawingFigure 1C
  • EP3582436B1 patent drawingFigure 2A~2B

AI summary

A power source equipment (PSE) controller exhibiting low standby levels for power over Ethernet (PoE) includes a micro-controller, a detection and classification circuitry coupled to the micro-controller to detect if a powered device (PD) is connected and determine power needed to operate the connected PD, a power control and monitor circuitry coupled to the micro-controller to power the connected PD and to monitor the power consumption of the PD. The detection and classification circuitry, the power control and monitor circuitry can be individually turned off by the micro-controller to minimize standby power, the micro-controller can be put into deep sleep if no PD is detected or can be come out of deep sleep if a PD is detected.