Pointer-Controlled Codeword Memory for Out-of-Order Soft Decoding

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Solution Overview

Problem

Current data processing systems in data detection systems often require increased processing power to handle data errors, leading to inefficiencies and high power consumption, especially when dealing with out-of-order codeword processing.

Innovation Solution

The implementation of a processing loop circuit with a queuing buffer and an out-of-order codeword memory circuit, which includes a soft decision decoder and a pointer controller, allows for efficient storage and retrieval of data sets by applying soft decoding algorithms and managing codeword memory locations to optimize processing order and reduce power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data processing systems apply soft decoding algorithms and process codewords multiple times to detect and correct data errors, then the reliability of data detection is improved, but the power consumption and processing time increase significantly

Engineering Contradiction:
Improvedata detection accuracyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by performing soft decoding algorithms and multiple processing iterations on codewords before final output. The system processes codewords through soft decision decoding, stores intermediate results in buffers, and performs multiple passes to ensure error correction convergence, thereby improving reliability while managing power consumption through controlled reprocessing rather than continuous high-power operation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements continuity of useful action by maintaining data in buffers and memory circuits for extended processing periods. The system keeps codewords available for multiple decoding attempts, allowing continuous processing until convergence is achieved, which improves detection accuracy while avoiding the need to restart processing from scratch, thus optimizing power efficiency

Inventive Principle:
Principle #20Continuity of useful action

2Device complexity

If the system processes codewords in strict sequential order to simplify memory management, then the device complexity is reduced, but the productivity and throughput decrease due to waiting for slower codewords

Engineering Contradiction:
Improvememory management complexityVSAvoiddata processing throughput
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent applies segmentation by dividing the codeword processing system into independent processing channels and separate buffer regions. Each codeword can be processed independently in its own time slot, with results stored in segmented buffer locations. This allows the system to maintain simple sequential memory addressing while enabling parallel processing of multiple codewords, thereby improving throughput without significantly increasing memory management complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses buffers and memory circuits as intermediaries between the sequential processing engine and the final output stage. These intermediary storage elements decouple the processing speed from the output rate, allowing fast-processing codewords to be held in buffers while slower ones complete processing, thereby improving overall throughput without requiring complex reordering logic in the processing engine itself

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If the system reorders codeword processing to optimize throughput by processing faster codewords first, then the productivity is improved, but the device complexity increases due to reordering requirements

Engineering Contradiction:
Improvedata processing throughputVSAvoidprocessing loop complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies dynamics by implementing a flexible buffer management system that dynamically assigns time slots and buffer locations based on processing status. The system can adaptively hold codewords in buffers for varying durations, release them in optimized sequences, and reassign processing resources dynamically. This dynamic approach enables throughput optimization without requiring permanent reordering structures, keeping the processing loop relatively simple while achieving improved productivity

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8522120B2Systems and methods for out of order Y-sample memory management
Publication Date: 2013.08.27 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8522120B2 patent drawing
  • US8522120B2 patent drawing
  • US8522120B2 patent drawing

AI summary

Systems and methods for out of order memory management.