Polar Code Check Bit Placement Using Reliability and Row Weight
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing polar code schemes in communication systems, particularly in 5G NR, face performance issues due to random selection of check bit positions, which affects the reliability and overall decoding performance.
Innovation Solution
A method and apparatus for determining check bit positions based on reliability order and row weight order in polar code encoding/decoding, ensuring higher reliability of check bit positions and optimizing the polar code performance by selecting bit positions from sets defined by optimization parameters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If check bit positions are randomly selected in existing polar code schemes, then the coding scheme is simple to implement, but the reliability of check bit positions cannot be ensured and overall decoding performance deteriorates
Solution Approach 1:
The patent changes the selection criterion parameter from random selection to selection based on reliability order and row weight order. This parameter change ensures that check bits are placed at positions with higher reliability, improving decoding performance while maintaining a systematic and deterministic selection process that is not overly complex
Solution Approach 2:
The patent performs preliminary determination of check bit positions based on pre-calculated reliability orders and row weights before the actual encoding process. This preliminary action ensures that high-reliability positions are identified and reserved for check bits in advance, preventing reliability degradation during runtime operations
2Reliability
If check bit positions are determined in reliability order, then decoding performance is improved, but the determination process becomes more complex compared to random selection
Solution Approach 1:
The patent introduces row weight order as an additional parameter alongside reliability order for determining check bit positions. This dual-parameter approach provides a more comprehensive criterion for position selection, improving decoding performance by considering both channel reliability and code structure properties
Solution Approach 2:
The patent segments the bit positions into information bit positions and check bit positions based on reliability and row weight criteria. This segmentation allows systematic allocation of check bits to high-reliability positions while reserving other positions for information bits, improving overall code performance through structured organization
3Reliability
If check bits are inserted at high reliability positions, then block error rate is reduced, but the encoding process requires more sophisticated position selection mechanisms
Solution Approach 1:
The patent changes the encoding process by incorporating reliability order and row weight order as selection parameters. This enables the encoder to systematically identify and insert check bits at high-reliability positions, reducing block error rate while maintaining a deterministic and implementable encoding procedure
Solution Approach 2:
The patent enables the polar code scheme to self-determine optimal check bit positions based on intrinsic properties (reliability and row weights) of the code structure. This self-service mechanism eliminates the need for external optimization or complex adaptive algorithms, achieving improved performance through inherent code characteristics
Data Source
AI summary
Embodiments of this application provide a method for processing information bits. A communication device obtains K information bits and a code length M. The code length M is a length of an output sequence resulting from processing the information bits. The communication device generates an N-bit bit sequence that includes the K information bits and one or more parity check bits, encodes the bit sequence using a polar encoding formula to obtain an N-bit encoded sequence, rate matches the encoded sequence to obtain the output sequence, modulates the rate matched sequence to obtain output sequence and outputs the output sequence. When M−K>192, in the bit sequence, one of the parity check bits is placed in a bit position that is determined according to reliabilities of the bit positions in the bit sequence for placing the K information bits and the one or more parity check bits.