Polar Code Sectional CRC Decoding for Low-Latency Bit Flipping

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Solution Overview

Problem

The successive cancellation flip (SC-Flip) decoding algorithm for polar codes suffers from high latency and increased decoding time, especially in poor channel environments and when the maximum number of bit flips is large, due to its iterative decoding process that decodes one bit at a time and requires repeated decoding after CRC detection failures.

Innovation Solution

A decoding system and method that divides the encoded signal into sections based on CRC insertion positions, allowing for intermediate CRC checks and bit-flipping decoding within each section, reducing the need for full decoding before proceeding and limiting the number of bit flips, thereby reducing latency while maintaining improved error-correcting performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the SC-Flip algorithm performs iterative decoding by decoding one bit at a time and re-performing decoding after CRC detection failures, then error-correcting performance is improved, but latency and decoding time are significantly increased

Engineering Contradiction:
Improveerror-correcting performanceVSAvoiddecoding latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the polar code into multiple sections based on CRC insertion positions. Each section can be independently decoded and checked for CRC validity. This allows the decoder to process sections in parallel or in a pipelined manner, reducing the overall decoding latency while maintaining error-correcting performance through selective bit-flipping only in sections that fail CRC checks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary CRC checks on decoded sections before committing to full iterative decoding. By checking CRC validity after initial decoding of each section, the system can identify sections that require bit-flipping corrections without having to fully decode and re-decode the entire code, thus reducing latency while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the maximum number of bit flips is increased to handle poor channel environments, then error-correcting performance is maintained, but decoding time is significantly increased

Engineering Contradiction:
Improveerror-correcting performance in poor channelVSAvoiddecoding speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies bit-flipping corrections locally to only those sections that fail CRC checks, rather than uniformly applying maximum bit flips across the entire code. This localized approach maintains error-correcting performance in poor channel conditions while significantly reducing the average decoding time by avoiding unnecessary re-decoding of correctly received sections.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses partial action by performing bit-flipping only on sections that require correction based on CRC results, rather than applying the maximum number of bit flips to the entire code. This selective approach maintains reliability in poor channel environments while improving decoding productivity by avoiding excessive processing of already correct sections.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11483012B2Decoding system and method for low latency bit-flipping successive cancellation decoding for polar codes
Publication Date: 2022.10.25 AJOU UNIV IND ACADEMIC COOP FOUND
  • US11483012B2 patent drawing
  • US11483012B2 patent drawing
  • US11483012B2 patent drawing

AI summary

A method for decoding a signal encoded with polar codes by a decoding system is provided. The method comprises receiving, from a transmission system, a signal in which a plurality of cyclic redundancy checks (CRCs) are encoded by the polar codes, the plurality of CRCs being inserted into positions determined based on a plurality of information bits, a number of the plurality of information bits and a total code length, and decoding a code section including bits ranging from a first bit of the signal to a position where a last bit of a first CRC is inserted. The method further comprises re-performing successive cancellation flip decoding for the decoded code section, or determining whether to decode a next code section adjacent to the decoded code section, based on whether a CRC is detected in the decoded code section.