Polar Code Interleaver Layout for Higher-Order Modulation

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Solution Overview

Problem

Existing wireless communication networks face challenges in achieving optimal Signal-to-Noise Ratio (SNR) and Block Error Rate (BLER) performance, particularly under Additive White Gaussian Noise (AWGN), with traditional interleaver designs for polar codes failing to provide sufficient performance for higher-order modulation schemes.

Innovation Solution

A new interleaver design utilizing a right isosceles triangle-shaped or trapezoid-shaped matrix with varying columns between rows, where the number of columns in the first row is set based on the smallest integer P satisfying P*(P+1)/2≥N, is implemented for polar codes, along with the removal of inter-column permutation to reduce complexity and latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional interleaver designs are used for polar codes, then the device complexity is reduced, but the SNR and BLER performance deteriorates, especially for higher-order modulation schemes

Engineering Contradiction:
ImproveSNR and BLER performanceVSAvoidinterleaver structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interleaver is segmented into multiple rows with varying column counts, where the first row has a different number of columns than subsequent rows. This segmentation allows for optimized bit distribution across rows, improving SNR and BLER performance while maintaining manageable structural complexity through systematic design

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different rows in the interleaver are assigned different column counts based on local requirements. The first row uses a specific column count determined by the smallest integer P satisfying P*(P+1)/2≥N, while other rows adjust accordingly. This local quality variation optimizes performance for specific bit positions without requiring complete structural redesign

Inventive Principle:
Principle #3Local quality

2Reliability

If inter-column permutation is applied to improve performance, then the SNR and BLER performance improves, but the processing latency and complexity increases

Engineering Contradiction:
ImproveSNR and BLER performanceVSAvoidprocessing latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The inter-column permutation step is extracted and removed from the interleaving process. The patent achieves sufficient performance improvement through the row-variation structure alone, eliminating the need for additional permutation operations that would increase processing latency and computational complexity

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of manufacture

If a regular rectangular interleaver structure is used, then the ease of manufacture is improved, but the performance for higher-order modulation schemes deteriorates

Engineering Contradiction:
Improveinterleaver implementation easeVSAvoidperformance for higher-order modulation
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The interleaver transitions from a static regular rectangular structure to a dynamic structure where the number of columns varies by row. The first row has a column count based on the smallest integer P satisfying P*(P+1)/2≥N, while subsequent rows have different column counts. This dynamic adaptation to different row requirements enables optimized performance for higher-order modulation schemes while remaining implementable through clear mathematical rules

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12081333B2Efficient interleaver design for polar codes
Publication Date: 2024.09.03 QUALCOMM INC
  • US12081333B2 patent drawing
  • US12081333B2 patent drawing
  • US12081333B2 patent drawing

AI summary

Aspects of the disclosure relate to wireless communication devices configured to encode information blocks to produce code blocks and interleave the code blocks utilizing an interleaver including a plurality of rows and a plurality of columns, where the number of columns of the interleaver varies between the rows. In some examples, the interleaver includes a right isosceles triangle-shaped matrix of rows and columns. In other examples, the interleaver includes a trapezoid-shaped matrix of rows and columns.