Polar Error-Correction Coding for Parallel Decoding Latency
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Solution Overview
Problem
The Polar encoding technique faces challenges in speeding up the decoding process, particularly due to difficulties in parallelization as frame length increases, leading to longer processing latency and limited adaptability to varying communication conditions.
Innovation Solution
The proposed solution involves an encoding device that divides information bit sequences into blocks of constant length, performs error-correction encoding, and applies channel polarization processing to generate code bit sequences, while a decoding device parallelizes Polar decoding and adjusts bit lengths based on channel polarization information to facilitate high-speed error-correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the frame length is increased to improve bit error tolerance, then error correction capability is improved, but decoding processing latency increases due to difficulty in parallelization
Solution Approach 1:
The information bit sequence is divided into multiple blocks of constant bit length, and channel polarization processing is performed independently on each block. This segmentation enables parallel processing of multiple blocks simultaneously, reducing overall decoding latency while maintaining the error correction capability provided by the polar coding structure.
Solution Approach 2:
The patent transitions from sequential bit-by-bit decoding to block-based parallel processing by introducing a new dimension of processing organization. Multiple decoding operations are executed concurrently across different blocks, effectively transforming the time dimension into a parallel processing architecture that reduces latency.
2Device complexity
If sequential SC decoding is used to simplify the decoding process, then decoding complexity is reduced, but processing speed cannot be increased through parallel processing
Solution Approach 1:
The decoding process is segmented into independent block-level operations rather than sequential bit-level operations. Each block undergoes independent channel polarization processing followed by error correction decoding, allowing multiple blocks to be processed in parallel while maintaining the simplicity of the successive cancellation decoding approach within each block.
Solution Approach 2:
Channel polarization processing is performed in advance on divided blocks before the actual error correction decoding. This preliminary organization of data into polarized blocks enables subsequent parallel decoding operations without increasing the complexity of the decoding algorithm itself.
3Device complexity
If fixed block length encoding is used to simplify the encoding process, then encoding complexity is reduced, but adaptability to varying communication conditions is limited
Solution Approach 1:
The system dynamically adapts to varying communication conditions by adjusting the number of blocks and information bits per block based on channel polarization characteristics. While each block maintains a constant length for simplified processing, the overall structure is flexible and can be reconfigured for different coding rates and communication scenarios through the information bit length switching mechanism.
Solution Approach 2:
The patent changes the parameter of information bit length within blocks based on channel conditions and polarization information. By allowing the information bit length to switch between different values while maintaining constant block length, the system achieves adaptability to varying coding rates without increasing encoding complexity.
Data Source
AI summary
[Problem] Encoding and decoding techniques capable of speeding up an error-correction decoding process utilizing channel polarization are provided.[Solution] In an encoding device, the information bit sequence is input on division for each designated bit length; error-correction encoding is performed on an information block of the designated bit length to generate L M-bit codes, each M-bit code having a predetermined bit length M; the L M-bit codes are converted into M L-bit blocks each having a predetermined bit length of L; the M L-bit blocks are Polar-converted to M L-bit codes, each L-bit code having a bit length of L, through channel polarization processing; and division of the information bit sequence is determined based on channel polarization information.