Polar Code CRC Partitioning for Fast UE Channel Decoding
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Solution Overview
Problem
In 5G systems, designing CRC bits for new-type coding schemes like polar coding poses challenges, particularly in reducing the number of CRC bits for error checking without increasing the probability of false alarms during pruning and early-termination in channel decoding.
Innovation Solution
A method is proposed where a CRC bit block is generated by combining all bits from a second and a fifth bit block, with the fifth bit block having fixed values, ensuring that the CRC bits can be used for both error checking and pruning/early-termination while maintaining a low probability of false alarms, by employing a specific CRC cyclic generator polynomial and scrambling sequences related to identifiers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If partial CRC bits are used for pruning and early-termination in polar code decoding, then the productivity of channel decoding is improved, but the reliability of error check is degraded and the probability of false alarms is raised
Solution Approach 1:
The patent segments the CRC bit block into multiple parts: a first bit block containing all information bits, a second bit block containing some CRC bits for pruning and early-termination, and a third bit block containing remaining CRC bits for error checking. This segmentation allows different portions of CRC bits to serve different functions simultaneously, resolving the contradiction between improving decoding efficiency and maintaining error check reliability
Solution Approach 2:
The patent designs the CRC bit block to serve multiple functions: it enables both pruning and early-termination operations in polar code decoding (improving productivity) while simultaneously maintaining accurate error detection capability (preserving reliability). The multi-functional CRC design allows the same bit structure to support both speed optimization and accuracy requirements
2Device complexity
If the number of CRC bits is reduced for pruning and early-termination, then the device complexity is reduced, but the reliability of error detection is degraded
Solution Approach 1:
The patent applies local quality by assigning different roles to different portions of the CRC bit block. The first portion (second bit block) is optimized for pruning and early-termination operations, while the second portion (third bit block) is optimized for error checking. This localized functional assignment allows the system to reduce overall complexity while maintaining detection reliability through the dedicated error-checking portion
Data Source
AI summary
The disclosure provides a method and a device in a User Equipment (UE) and a base station for wireless communication. A first node generates a first bit block, performs channel coding and then transmits a first radio signal. The first bit block comprising all bits in a second bit block and all bits in a third bit block is used for an input of the channel coding, and an output of the channel coding is used for generating the first radio signal. A Cyclic Redundancy Check (CRC) bit block of a fourth bit block is used for generating the third bit block. The fourth bit block comprises all bits in the second bit block and all bits in a fifth bit block, the bits in the fifth bit block are of fixed values, and the fifth bit block is composed of K bits, the K being a positive integer.