Polar Code CRC Interleaving for Early SC/SCL Error Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
CRC-concatenated polar codes face challenges in detecting decoding errors early during the decoding process, leading to increased latency and power consumption, and have a finite probability of undetected errors.
Innovation Solution
A communication apparatus that interleaves CRC bits using a combination of first and second interleavers before polar encoding, allowing for early detection of decoding errors and reducing the undetected error rate by positioning CRC bits strategically based on error probabilities and column weights in the parity check matrix.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If CRC check is performed after SC/SCL decoding is finished, then decoding completeness is ensured, but latency and power consumption increase
Solution Approach 1:
The patent applies preliminary action by performing CRC checks at intermediate stages during the SC/SCL decoding process rather than waiting for completion. The decoder periodically checks CRC validity after decoding certain number of bits, allowing early termination when errors are detected, thus reducing latency while maintaining reliability
2Reliability
If CRC check is performed after SC/SCL decoding is finished, then all decoding errors are detected, but power consumption increases due to unnecessary processing
Solution Approach 1:
The patent performs CRC checks at intermediate stages during decoding, allowing early termination when errors are detected. This prevents unnecessary continuation of the decoding process, reducing power consumption while maintaining comprehensive error detection capability
Solution Approach 2:
The decoding process itself provides error detection service through integrated CRC checks at intermediate stages, eliminating the need for a separate post-decoding error detection phase, thus reducing overall power consumption
3Ease of manufacture
If CRC bits are appended at the end of information bits, then encoding simplicity is maintained, but early error detection capability is lost
Solution Approach 1:
The patent performs CRC checks at intermediate stages during decoding, allowing early termination when errors are detected. This prevents unnecessary continuation of the decoding process, reducing power consumption while maintaining comprehensive error detection capability
Solution Approach 2:
The decoding process itself provides error detection service through integrated CRC checks at intermediate stages, eliminating the need for a separate post-decoding error detection phase, thus reducing overall power consumption
Data Source
AI summary
A communication apparatus for forward error correction and detection using polar codes comprising a polar encoder that encodes an input vector to output a codeword using a generator matrix of polar code wherein the input vector is a cyclic redundancy check (CRC) codeword of an information block; a memory that stores a frozen set including frozen bit indices and a non-frozen set including non-frozen bit indices sorted in order of error probabilities; and a controller that is configured to take as input the CRC codeword where CRC bits appended to the end of information block and interleave the CRC codeword using at least one of a first interleaver and second interleaver before feeding the CRC codeword to polar encoder such that the first interleaver places at least one CRC bit earlier than its original position in the CRC codeword and a second interleaver selects at least one bit from the CRC codeword whose corresponding index in a parity check matrix of the CRC code has the highest column weight and puts it in the non-frozen bit index with highest error probability.