Polar Decoder Architecture With Stored Reliability Sequences
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Solution Overview
Problem
Existing polar decoders for 5G NR PUCCH face inefficiencies in resource utilization, particularly in the use of look-up tables (LUTs) and flip-flops when implemented on RFSoC, necessitating a more efficient decoder system.
Innovation Solution
A Field Programmable Gate Array (FPGA) implementation of a polar decoder that includes a core block with pre-calculated reliability sequences and a CRC module, optimizing decoding through successive cancellation and list decoding with reduced resource consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a polar decoder is implemented on RFSoC using conventional methods, then decoding functionality is achieved, but resource utilization becomes inefficient with high consumption of LUTs and flip-flops
Solution Approach 1:
The patent pre-calculates and stores reliability sequences (bitmaps) before decoding operations. These pre-computed sequences are stored in memory and retrieved during decoding, eliminating the need for complex real-time calculations and reducing LUT requirements by 96.8% compared to conventional implementations
Solution Approach 2:
The patent uses stored bitmap copies of reliability sequences instead of performing complex calculations during decoding. The bitmaps serve as simplified representations that can be quickly referenced, replacing resource-intensive computational structures with lightweight data storage and retrieval operations
2Measurement precision
If reliability sequences are calculated in real-time during decoding, then accurate decoding is achieved, but computational complexity and resource usage increase significantly
Solution Approach 1:
Reliability sequences are pre-calculated offline and stored as bitmaps in memory. During actual decoding operations, these pre-computed sequences are simply retrieved and applied, maintaining decoding accuracy while eliminating real-time computational complexity
Solution Approach 2:
The patent replaces the mechanical/computational process of real-time reliability calculation with a data retrieval process. Complex computational operations are substituted with simple memory read operations, dramatically reducing resource consumption while preserving decoding precision
Data Source
AI summary
The present disclosure provides a system and method for polar decoding in a communication system. A polar decoder includes a core block including a successive cancellation decoder and a list decoder, and a cyclic redundancy check (CRC) module, wherein the core block stores one or more pre-calculated reliability sequence for decoding the received encoded data bits.


