Polar Code Decoding Using Future Constraints for Better Bit Estimation

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Solution Overview

Problem

Conventional SC-based decoding methods for polar codes do not optimally consider future constraints, such as frozen bits and parity bits, which can lead to suboptimal error correction performance.

Innovation Solution

The proposed method modifies the decoding process to accurately account for future constraints by using a modified transition probability calculation and LLR computation, allowing for more accurate bit estimation and improved decoding performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional SC-based decoding methods are used for polar codes, then the decoding process is simple and computationally efficient, but the error correction performance is suboptimal due to not considering future constraints

Engineering Contradiction:
Improveerror correction performanceVSAvoiddecoding process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing transition probabilities that incorporate future constraints (frozen bits and parity bits) before the actual decoding process. The decoder pre-processes the polar code structure to identify all future constraints and computes their impact on current bit decisions, so that when decoding occurs, these constraints are already integrated into the decision-making process. This allows the system to achieve near-optimal error correction performance without adding significant complexity during the actual decoding operation.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If future constraints are incorporated into the decoding process, then bit estimation accuracy is improved, but the computational complexity increases

Engineering Contradiction:
Improvebit estimation accuracyVSAvoidcomputational power
Core Design Contradiction:
Measurement precisionVSPower

Solution Approach 1:

The patent changes the parameter of transition probability calculation to incorporate future constraints. Instead of using standard transition probabilities that only consider past and present bits, the method modifies the transition probability function to include the influence of future frozen bits and parity bits. This parameter change allows the decoder to make more accurate bit estimation decisions by considering the complete code structure, while the computational overhead is managed through efficient algorithms that reuse pre-computed values.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If modified transition probability calculation is used to account for future constraints, then decoding reliability is enhanced, but the decoding speed may be reduced

Engineering Contradiction:
Improvedecoding reliabilityVSAvoiddecoding speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent applies preliminary action by pre-computing the impact of future constraints on transition probabilities before the sequential decoding process begins. The decoder identifies all frozen bits and parity bits in advance, calculates their combined effect on each position in the codeword, and stores these pre-computed values. During the actual decoding process, the decoder simply retrieves and applies these pre-computed transition probabilities, which maintains decoding speed while significantly improving reliability through more accurate bit estimation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250070916A1Device and method for decoding polar codes by using future constraints in communication system or broadcasting system
Publication Date: 2025.02.27 SAMSUNG ELECTRONICS CO LTD
  • US20250070916A1 patent drawing
  • US20250070916A1 patent drawing
  • US20250070916A1 patent drawing

AI summary

Embodiments of the disclosure provide a device in a communication system or a broadcasting system that may comprise: a memory, at least one transceiver and at least one processor comprising processing circuitry. At least one processor, individually and/or collectively, may be configured to: receive a signal including bits encoded based on polar codes; identify a polar code configuration for at least one information bit and at least one frozen bit of the signal; and decode the signal based on the configuration of the polar codes.