Polar Code Decoding with Parallel LLR Decisions and Lower Delay

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Solution Overview

Problem

The existing polar code decoding methods, particularly the Successive Cancellation List (SCL) algorithm, suffer from high computational complexity and decoding delays due to the need for extensive path splitting and PM value sorting, especially when dealing with large quantities of decoded bits.

Innovation Solution

The proposed decoding method and apparatus implement a parallel decision process by performing hard decisions and path splitting at intermediate levels, reducing computational complexity by moving processes such as path splitting, PM value accumulation, and error correction to earlier stages, utilizing a generator matrix and symptom diagnosis table to select candidate vectors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the SCL algorithm performs path splitting and PM value sorting for each decoded bit, then decoding performance is improved, but computational complexity and decoding delay increase significantly

Engineering Contradiction:
Improvedecoding performanceVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the decoding process into distinct stages: performing hard decisions on multiple LLRs simultaneously to generate candidate vectors, then sorting only these candidate vectors by PM values. This segmentation reduces the total number of sorting operations compared to traditional bit-by-bit SCL decoding, thereby lowering computational complexity while preserving decoding performance through maintained path exploration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary hard decisions on multiple LLRs to generate candidate vectors before the sorting operation. This preliminary action consolidates path exploration results in advance, allowing the subsequent sorting step to operate on a reduced set of candidates rather than continuously sorting after each bit decision, thus reducing overall computational complexity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the SCL algorithm performs path splitting and PM value sorting for each decoded bit, then decoding performance is improved, but decoding delay increases

Engineering Contradiction:
Improvedecoding performanceVSAvoiddecoding delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the decoding process to perform hard decisions on multiple LLRs in parallel and consolidates sorting operations. This segmentation reduces the frequency of sorting operations from bit-by-bit to batch-based, significantly reducing decoding delay while maintaining performance through adequate path exploration in each batch.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent maintains continuous useful action by performing hard decisions on multiple LLRs simultaneously rather than sequentially processing one bit at a time. This parallel processing approach keeps the decoding pipeline full and reduces idle time, thereby reducing overall decoding delay while preserving the path exploration necessary for performance.

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If parallel decisions are performed on intermediate-level LLRs, then computational complexity and decoding delay are reduced, but decoding performance may be compromised

Engineering Contradiction:
Improvedecoding speedVSAvoiddecoding performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies partial action by performing hard decisions on a selected subset of intermediate-level LLRs rather than all LLRs, and sorting only the resulting candidate vectors. This partial processing reduces computational complexity and decoding delay while maintaining adequate decoding performance through strategic selection of which LLRs to process in parallel.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP3731418B1Decoding method and device
Publication Date: 2025.08.27 HUAWEI TECH CO LTD
  • EP3731418B1 patent drawingFigure 1~2
  • EP3731418B1 patent drawingFigure 3~4
  • EP3731418B1 patent drawingFigure 5~6

AI summary

A decoding method and apparatus are provided, to improve a degree of parallelism in decoded bit decisions and reduce a decoding delay. The method includes: performing a hard decision on each LLR in an inputted LLR vector having a length of M to obtain an original vector, where M≤N and N is a length of to-be-decoded information; determining Y to-be-diagnosed vectors based on the original vector, where the to-be-diagnosed vector is obtained by performing negation on at least 0 of X elements in the original vector, locations of the X elements in the original vector are consistent with locations of the first X LLRs sorted in ascending order of absolute values in the LLR vector, and Y≤2x; determining at least one candidate vector based on each of the Y to-be-diagnosed vectors and a symptom diagnosis table; and selecting L candidate vectors from at least Y candidate vectors obtained by using the Y to-be-diagnosed vectors, and determining decoding results of the LLR vector based on the L candidate vectors.