Polar Code Decoding Position Control for Low-Memory SCF Re-Decoding
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The successive cancellation flip (SCF) decoding scheme for polar codes improves error correction performance but significantly increases memory usage and power consumption due to the need to store information at multiple positions during the decoding process.
Innovation Solution
A method and apparatus for generating a decoding position control signal using a decoding tree structure, where nodes are decoded sequentially in a depth-first search method, and control signals are generated based on bit strings using binary representation and operations like addition and XOR, reducing memory requirements and enabling efficient hardware implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SCF decoding scheme is used to improve error correction performance, then error correction capability is improved, but memory usage and power consumption increase significantly
Solution Approach 1:
The patent extracts only the essential information needed for SCF decoding by implementing a streamlined process that returns to previous bit positions without requiring extensive storage of intermediate decoding states. The decoder maintains minimal memory structures, storing only necessary LLR values and decoding states for the current and previous positions, rather than storing all intermediate states.
Solution Approach 2:
The patent changes the decoding approach by modifying how decoding positions are managed during SCF operations. Instead of storing multiple complete decoding states, the system uses position tracking parameters and selective state retention, where only relevant decoding parameters are preserved for backtracking operations.
2Reliability
If SCF decoding scheme is used to improve error correction performance, then error correction capability is improved, but power consumption increases
Solution Approach 1:
The patent removes unnecessary computational overhead by implementing a simplified SCF decoding process that avoids redundant calculations. The decoder performs minimal operations when backtracking to previous positions, computing only the essential LLR updates needed for bit flipping, rather than re-executing entire decoding sequences.
Solution Approach 2:
The patent applies partial action by performing selective re-decoding only at specific bit positions where errors are detected, rather than re-decoding the entire codeword. This partial re-processing approach maintains error correction effectiveness while significantly reducing the computational energy required compared to complete re-decoding.
3Reliability
If additional memory is added to store information at multiple positions, then SCF decoding capability is maintained, but device complexity increases
Solution Approach 1:
The patent extracts the core SCF functionality by implementing a minimal memory architecture that stores only essential decoding information. The decoder uses compact data structures that hold LLR values and position markers for a limited number of recent positions, eliminating the need for complex multi-position storage structures while maintaining SCF capability.
Solution Approach 2:
The patent makes the decoder structure universal by designing a flexible memory system that can handle both standard SC decoding and SCF decoding operations using the same basic components. The memory structure is configured to serve multiple purposes: storing current decoding states, previous positions for backtracking, and LLR values, thereby reducing overall device complexity through component multi-functionality.
Data Source
AI summary
Disclosed are a method and apparatus for generating a decoding position control signal for decoding using polar codes. The method and apparatus for generating a decoding position control signal for decoding using polar codes according to an embodiment of the present disclosure include generating a decoding tree obtained by forming a plurality of nodes in a hierarchical structure for a polar-encoded codeword, decoding the codeword using a successive cancellation (SC) decoding technique, and generating control signal through a preset operation relationship based on a position of a bit returned during re-decoding among the decoded codeword.