Polar Code Decoding With Recurrent Bit Inversion and STE Checks
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Solution Overview
Problem
Conventional polar code decoders, such as SC and SCL decoders, face challenges in efficiently correcting decoding errors without increasing hardware complexity or power consumption, particularly in resource-constrained devices like sensor motes or IoT terminals.
Innovation Solution
A communication apparatus and method that partitions a codeword into frames with check bits computed by a checksum equation, using a susceptible to error (STE) set to initiate recurrent decoding attempts and perform bit-inversion operations, allowing for accurate prediction and correction of decoding errors without additional hardware resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If SCL decoder runs L number of SC decoders in parallel to improve error correction performance, then decoding reliability is improved, but hardware complexity increases significantly
Solution Approach 1:
The invention segments the decoding process into multiple attempts, where each attempt uses a single SC decoder. Instead of running L parallel decoders simultaneously, the system performs sequential decoding attempts, with each attempt focusing on correcting errors in specific bit positions identified from previous attempts. This segmentation transforms the parallel hardware requirement into sequential temporal operations.
Solution Approach 2:
The invention performs preliminary identification of error-prone bit positions using reliability metrics (such as log-likelihood ratios) before the actual correction attempt. By pre-identifying which bits are most likely to contain errors based on channel observations and previous decoding results, the system can focus subsequent decoding attempts on specific positions, improving efficiency without requiring parallel hardware.
2Reliability
If multiple decoding attempts are performed to correct errors, then error correction performance is improved, but power consumption increases
Solution Approach 1:
The invention applies partial action by performing decoding attempts only on specific bit positions that are identified as error-prone, rather than re-decoding the entire message. By using reliability metrics to identify only the necessary bits that require correction attempts, the system reduces the computational load and power consumption compared to full re-decoding, while still achieving improved error correction performance.
3Device complexity
If conventional SC decoder decodes each bit only once in sequential manner, then hardware complexity is kept low, but error correction performance deteriorates due to error propagation
Solution Approach 1:
The invention implements feedback by using the results from initial decoding attempts to inform subsequent decoding attempts. Reliability metrics (such as log-likelihood ratios) from the first pass are fed back to identify which bits are most likely erroneous, and this information guides the second decoding attempt to focus on correcting those specific bits. This feedback loop enables error correction without requiring complex parallel hardware.
Data Source
AI summary
A communication method and device which can improve error correction performance and power consumption without increasing hardware complexity is disclosed. A communication apparatus includes: a decoder for polar codes, that decodes a codeword in which a frame is partitioned according to a predetermined partitioning rule and each partition includes at least one check bit computed by a predefined checksum equation; a memory that stores a frozen set including frozen bit indices, a non-frozen set including non-frozen bit indices, and a susceptible to error (STE) set including STE indices susceptible to decoding error for each partition; and a controller configured to: compute a check sum of at least one decoded bit for each partition according to the predefined checksum equation; responsive to failure of checksum, initiate a recurrent decoding attempt on the partition; and perform a bit-inversion operation on at least one STE index in each recurrent decoding attempt.