Polar Modulator PLL Topology for Harmonic Suppression
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Solution Overview
Problem
Existing transmitter modules in communication devices face challenges in implementing baseband and RF on a single chip for multiple wireless communication standards, leading to non-linearity in voltage controlled oscillators due to large modulation phases and distortion, especially in wideband communication systems, and fail to suppress even order harmonics effectively.
Innovation Solution
A novel architecture incorporating a phase locked loop (PLL) with a two-point modulation topology and a double balanced up-converter mixer/modulator that divides phase information and frequency deviation by a factor of two, and performs gain and phase adjustments of 0° and +180°, suppressing even harmonics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single chip is used to implement baseband and RF for multiple wireless communication standards, then device integration and versatility are improved, but non-linearity in voltage controlled oscillators increases due to large modulation phases
Solution Approach 1:
The modulation process is divided into two separate stages: a first modulator that applies a first modulation phase with limited phase range, and a second modulator that applies a second modulation phase. This segmentation allows each modulator to operate within optimal phase ranges, preventing the large modulation phases that cause non-linearity in the VCO while still achieving the required modulation depth for multiple communication standards.
2Productivity
If large modulation phases are used to achieve wideband communication, then frequency deviation and modulation depth are improved, but distortion in the voltage controlled oscillator increases
Solution Approach 1:
The total frequency deviation requirement is segmented between two modulators. The first modulator handles a portion of the frequency deviation with limited phase range, while the second modulator handles the remaining portion. This prevents any single VCO from experiencing large modulation phases that would cause distortion, while still achieving the overall wideband communication capability.
3Device complexity
If conventional modulation topology is used, then implementation simplicity is maintained, but even order harmonics are not suppressed effectively
Solution Approach 1:
The patent employs asymmetric modulation points in the two modulators, where the first modulator uses modulation points at ±90 degrees and the second modulator uses modulation points at 0 and 180 degrees. This asymmetric configuration creates cancellation of even-order harmonics in the combined output signal, effectively suppressing these harmful frequency components without requiring complex additional filtering circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables efficient implementation of a transmitter module with reduced distortion and improved harmonic suppression, supporting multiple wireless communication standards on a single chip, enhancing performance in wideband communication systems.
Implementation Method 1
Within the PLL, a two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±π/2) in which the phase information dynamic range is divided by a factor (e.g., by 2) and a maximum frequency deviation is also divided by a factor (e.g., by 2).
Implementation Method 2
a double balanced up-converter mixer/modulator that divides phase information and frequency deviation by a factor of two, and performs gain and phase adjustments of 0° and +180°, suppressing even harmonics
Data Source
AI summary
Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±π/2), the phase information dynamic range is divided by a factor (e.g., by 2), and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator performs gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +π (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.